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target/arm: Add the hypervisor virtual counter

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Backports commit 8c94b071a09c2183f032febff3112f2b7662156c from qemu
This commit is contained in:
Richard Henderson 2020-03-21 15:35:34 -04:00 committed by Lioncash
parent 8e2ac48ad0
commit d6150127b4
19 changed files with 79 additions and 5 deletions
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1
qemu/aarch64.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_aarch64
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_aarch64
#define arm_gt_htimer_cb arm_gt_htimer_cb_aarch64
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_aarch64
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_aarch64
#define arm_gt_stimer_cb arm_gt_stimer_cb_aarch64
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_aarch64

1
qemu/aarch64eb.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_aarch64eb
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_aarch64eb
#define arm_gt_htimer_cb arm_gt_htimer_cb_aarch64eb
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_aarch64eb
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_aarch64eb
#define arm_gt_stimer_cb arm_gt_stimer_cb_aarch64eb
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_aarch64eb

1
qemu/arm.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_arm
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_arm
#define arm_gt_htimer_cb arm_gt_htimer_cb_arm
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_arm
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_arm
#define arm_gt_stimer_cb arm_gt_stimer_cb_arm
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_arm

1
qemu/armeb.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_armeb
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_armeb
#define arm_gt_htimer_cb arm_gt_htimer_cb_armeb
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_armeb
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_armeb
#define arm_gt_stimer_cb arm_gt_stimer_cb_armeb
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_armeb

1
qemu/header_gen.py
View file

@ -173,6 +173,7 @@ symbols = (
'arm_gen_test_cc',
'arm_generate_debug_exceptions',
'arm_gt_htimer_cb',
'arm_gt_hvtimer_cb',
'arm_gt_ptimer_cb',
'arm_gt_stimer_cb',
'arm_gt_vtimer_cb',

1
qemu/m68k.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_m68k
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_m68k
#define arm_gt_htimer_cb arm_gt_htimer_cb_m68k
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_m68k
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_m68k
#define arm_gt_stimer_cb arm_gt_stimer_cb_m68k
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_m68k

1
qemu/mips.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_mips
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_mips
#define arm_gt_htimer_cb arm_gt_htimer_cb_mips
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_mips
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_mips
#define arm_gt_stimer_cb arm_gt_stimer_cb_mips
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_mips

1
qemu/mips64.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_mips64
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_mips64
#define arm_gt_htimer_cb arm_gt_htimer_cb_mips64
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_mips64
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_mips64
#define arm_gt_stimer_cb arm_gt_stimer_cb_mips64
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_mips64

1
qemu/mips64el.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_mips64el
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_mips64el
#define arm_gt_htimer_cb arm_gt_htimer_cb_mips64el
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_mips64el
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_mips64el
#define arm_gt_stimer_cb arm_gt_stimer_cb_mips64el
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_mips64el

1
qemu/mipsel.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_mipsel
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_mipsel
#define arm_gt_htimer_cb arm_gt_htimer_cb_mipsel
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_mipsel
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_mipsel
#define arm_gt_stimer_cb arm_gt_stimer_cb_mipsel
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_mipsel

1
qemu/powerpc.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_powerpc
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_powerpc
#define arm_gt_htimer_cb arm_gt_htimer_cb_powerpc
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_powerpc
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_powerpc
#define arm_gt_stimer_cb arm_gt_stimer_cb_powerpc
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_powerpc

1
qemu/riscv32.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_riscv32
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_riscv32
#define arm_gt_htimer_cb arm_gt_htimer_cb_riscv32
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_riscv32
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_riscv32
#define arm_gt_stimer_cb arm_gt_stimer_cb_riscv32
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_riscv32

1
qemu/riscv64.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_riscv64
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_riscv64
#define arm_gt_htimer_cb arm_gt_htimer_cb_riscv64
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_riscv64
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_riscv64
#define arm_gt_stimer_cb arm_gt_stimer_cb_riscv64
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_riscv64

1
qemu/sparc.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_sparc
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_sparc
#define arm_gt_htimer_cb arm_gt_htimer_cb_sparc
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_sparc
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_sparc
#define arm_gt_stimer_cb arm_gt_stimer_cb_sparc
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_sparc

1
qemu/sparc64.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_sparc64
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_sparc64
#define arm_gt_htimer_cb arm_gt_htimer_cb_sparc64
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_sparc64
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_sparc64
#define arm_gt_stimer_cb arm_gt_stimer_cb_sparc64
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_sparc64

1
qemu/target/arm/cpu-qom.h
View file

@ -70,6 +70,7 @@ void arm_gt_ptimer_cb(void *opaque);
void arm_gt_vtimer_cb(void *opaque);
void arm_gt_htimer_cb(void *opaque);
void arm_gt_stimer_cb(void *opaque);
void arm_gt_hvtimer_cb(void *opaque);
#define ARM_AFF0_SHIFT 0
#define ARM_AFF0_MASK (0xFFULL << ARM_AFF0_SHIFT)

11
qemu/target/arm/cpu.h
View file

@ -134,11 +134,12 @@ typedef struct ARMGenericTimer {
uint64_t ctl; /* Timer Control register */
} ARMGenericTimer;
#define GTIMER_PHYS 0
#define GTIMER_VIRT 1
#define GTIMER_HYP 2
#define GTIMER_SEC 3
#define NUM_GTIMERS 4
#define GTIMER_PHYS 0
#define GTIMER_VIRT 1
#define GTIMER_HYP 2
#define GTIMER_SEC 3
#define GTIMER_HYPVIRT 4
#define NUM_GTIMERS 5
typedef struct {
uint64_t raw_tcr;

56
qemu/target/arm/helper.c
View file

@ -2336,6 +2336,7 @@ static uint64_t gt_tval_read(CPUARMState *env, const ARMCPRegInfo *ri,
switch (timeridx) {
case GTIMER_VIRT:
case GTIMER_HYPVIRT:
offset = gt_virt_cnt_offset(env);
break;
}
@ -2352,6 +2353,7 @@ static void gt_tval_write(CPUARMState *env, const ARMCPRegInfo *ri,
switch (timeridx) {
case GTIMER_VIRT:
case GTIMER_HYPVIRT:
offset = gt_virt_cnt_offset(env);
break;
}
@ -2512,6 +2514,34 @@ static void gt_sec_ctl_write(CPUARMState *env, const ARMCPRegInfo *ri,
gt_ctl_write(env, ri, GTIMER_SEC, value);
}
static void gt_hv_timer_reset(CPUARMState *env, const ARMCPRegInfo *ri)
{
gt_timer_reset(env, ri, GTIMER_HYPVIRT);
}
static void gt_hv_cval_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
gt_cval_write(env, ri, GTIMER_HYPVIRT, value);
}
static uint64_t gt_hv_tval_read(CPUARMState *env, const ARMCPRegInfo *ri)
{
return gt_tval_read(env, ri, GTIMER_HYPVIRT);
}
static void gt_hv_tval_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
gt_tval_write(env, ri, GTIMER_HYPVIRT, value);
}
static void gt_hv_ctl_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
gt_ctl_write(env, ri, GTIMER_HYPVIRT, value);
}
void arm_gt_ptimer_cb(void *opaque)
{
ARMCPU *cpu = opaque;
@ -2540,6 +2570,13 @@ void arm_gt_stimer_cb(void *opaque)
gt_recalc_timer(cpu, GTIMER_SEC);
}
void arm_gt_hvtimer_cb(void *opaque)
{
ARMCPU *cpu = opaque;
gt_recalc_timer(cpu, GTIMER_HYPVIRT);
}
static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
/* Note that CNTFRQ is purely reads-as-written for the benefit
* of software; writing it doesn't actually change the timer frequency.
@ -5950,6 +5987,25 @@ static const ARMCPRegInfo vhe_reginfo[] = {
.opc0 = 3, .opc1 = 4, .crn = 2, .crm = 0, .opc2 = 1,
.access = PL2_RW, .writefn = vmsa_tcr_ttbr_el2_write,
.fieldoffset = offsetof(CPUARMState, cp15.ttbr1_el[2]) },
#ifndef CONFIG_USER_ONLY
{ .name = "CNTHV_CVAL_EL2", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 4, .crn = 14, .crm = 3, .opc2 = 2,
.fieldoffset =
offsetof(CPUARMState, cp15.c14_timer[GTIMER_HYPVIRT].cval),
.type = ARM_CP_IO, .access = PL2_RW,
.writefn = gt_hv_cval_write, .raw_writefn = raw_write },
{ .name = "CNTHV_TVAL_EL2", .state = ARM_CP_STATE_BOTH,
.opc0 = 3, .opc1 = 4, .crn = 14, .crm = 3, .opc2 = 0,
.type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL2_RW,
.resetfn = gt_hv_timer_reset,
.readfn = gt_hv_tval_read, .writefn = gt_hv_tval_write },
{ .name = "CNTHV_CTL_EL2", .state = ARM_CP_STATE_BOTH,
.type = ARM_CP_IO,
.opc0 = 3, .opc1 = 4, .crn = 14, .crm = 3, .opc2 = 1,
.access = PL2_RW,
.fieldoffset = offsetof(CPUARMState, cp15.c14_timer[GTIMER_HYPVIRT].ctl),
.writefn = gt_hv_ctl_write, .raw_writefn = raw_write },
#endif
REGINFO_SENTINEL
};

1
qemu/x86_64.h
View file

@ -167,6 +167,7 @@
#define arm_gen_test_cc arm_gen_test_cc_x86_64
#define arm_generate_debug_exceptions arm_generate_debug_exceptions_x86_64
#define arm_gt_htimer_cb arm_gt_htimer_cb_x86_64
#define arm_gt_hvtimer_cb arm_gt_hvtimer_cb_x86_64
#define arm_gt_ptimer_cb arm_gt_ptimer_cb_x86_64
#define arm_gt_stimer_cb arm_gt_stimer_cb_x86_64
#define arm_gt_vtimer_cb arm_gt_vtimer_cb_x86_64