xorstream
8e45102b43
Arm support ported. ( #736 )
...
* Fix for MIPS issue.
* Sparc support added.
* M68K support added.
* Arm support ported.
* Fix issue with VS2015 shlobj.h file
2017-01-23 23:30:57 +08:00
Nguyen Anh Quynh
206819bd98
cleanup after msvc port
2017-01-22 21:27:17 +08:00
xorstream
770c5616e2
Automated leading tab to spaces conversion.
2017-01-21 12:28:22 +11:00
xorstream
429bfca48e
Fixes for MSVC native support to still work with GCC/GNU.
2017-01-21 01:07:10 +11:00
xorstream
fac6a66860
platform.h move #3
2017-01-21 00:13:21 +11:00
xorstream
92392e0f57
Merge with current master.
2017-01-20 18:22:28 +11:00
Nguyen Anh Quynh
b678512fc1
remove kvm stuffs
2017-01-20 01:03:59 +08:00
xorstream
1aeaf5c40d
This code should now build the x86_x64-softmmu part 2.
2017-01-19 22:50:28 +11:00
Nguyen Anh Quynh
287e047fdb
delete sparc32_dma.h & arm-semi.c
2017-01-19 15:10:41 +08:00
Elton G
47150b6df3
reg_read and reg_write now work with registers W0 through W30 in Aarch64 ( #716 )
...
* reg_read and reg_write now work with registers W0 through W30 in Aarch64 emulaton
* Added a regress test for the ARM64 reg_read and reg_write on 32-bit registers (W0-W30)
Added a new macro in uc_priv.h (WRITE_DWORD_TO_QWORD), in order to write to the lower 32 bits of a 64 bit value without overwriting the whole value when using reg_write
* Fixed WRITE_DWORD macro
reg_write would zero out the high order bits when writing to 32 bit registers
e.g. uc.reg_write(UC_X86_REG_EAX, 0) would also set register RAX to zero
2017-01-15 20:13:35 +08:00
Agustin Gianni
a63a34bfbc
Allow the client to write to CPSR
2017-01-05 00:00:15 +01:00
Chris Eagle
fccbcfd4c2
revert to use of g_free to make future qemu integrations easier ( #695 )
...
* revert to use of g_free to make future qemu integrations easier
* bracing
2016-12-21 22:28:36 +08:00
Chris Eagle
f8f9e993a8
merge upstream/noglib and update some glib related types
2016-12-19 12:32:06 -08:00
Chris Eagle
e07e57a862
battling git
2016-12-19 12:10:02 -08:00
Chris Eagle
71bda8e012
stick to gint/guint rather than int32_t/uint32_t
2016-12-19 09:43:35 -08:00
Nguyen Anh Quynh
bd1632e60c
fix an warning 'control may reach end of non-void function'
2016-12-20 00:21:02 +08:00
Chris Eagle
e46545f722
remove glib dependency by provide compatible replacements
2016-12-18 14:56:58 -08:00
Nguyen Anh Quynh
b7cdbe7a88
Merge branch 'feat/reg_save_restore' of https://github.com/rhelmot/unicorn into rhelmot-feat/reg_save_restore
2016-10-07 09:57:07 +08:00
Nguyen Anh Quynh
7d15a60b25
arm64: disable deadcode introduced by PR #643
2016-09-29 12:34:44 +08:00
Nguyen Anh Quynh
507d557aa5
arm: disable deadcode introduced by PR #643
2016-09-29 12:33:16 +08:00
Ryan Hileman
cb615fdba7
remove uc->cpus
2016-09-23 07:38:21 -07:00
Andrew Dutcher
0ef2b5fd71
New feature: registers can be bulk saved/restored in an opaque blob
2016-08-20 04:14:07 -07:00
Andrew Dutcher
97b10da133
Undo the disaster that was the patch to unicorn github issue #266 and fix it correctly. makes normal self-modifying code work.
2016-08-09 19:35:20 -07:00
Nguyen Anh Quynh
fd39ec465b
arm: sync env.uc->thumb with env.thumb in arm_reg_write()
2016-07-30 13:21:44 +08:00
Eloi Sanfelix
3a1c13fda9
Set thumb mode based on PC value in ARM. Mask off last bit of PC.
2016-06-17 13:46:34 +02:00
Nguyen Anh Quynh
40ac55cf74
Merge branch 'drop-zlib' of https://github.com/radare/unicorn into radare-drop-zlib
2016-06-15 16:41:13 +07:00
pancake
fe96e8325b
Remove unused zlib dependency
2016-06-15 09:24:16 +02:00
mkravchik
4b45869437
Reading and writing NEON registers
2016-05-04 11:23:32 +03:00
Nguyen Anh Quynh
8932463f9d
arm: qutie emulation on EXCP_YIELD exception. this fixes testcase 004-segmentation_fault_1 in #520
2016-04-20 12:04:15 +08:00
Nguyen Anh Quynh
cc6cbc5cf7
Merge branch 'memleak' into m2
2016-04-18 12:48:13 +08:00
Ryan Hileman
acd88856e1
add batched reg access
2016-04-04 20:51:38 -07:00
Nguyen Anh Quynh
fb1ebac000
Merge branch 'master' into m1
2016-03-09 15:13:42 +08:00
Hiroyuki UEKAWA
c5888e5670
move macros in qemu/target-*/unicorn*.c
to uc_priv.h
2016-03-02 12:43:02 +09:00
Hiroyuki UEKAWA
1cd3c3093b
fix WRITE_BYTE_H
2016-03-02 10:51:50 +09:00
Nguyen Anh Quynh
b69feb8d0b
Merge branch 'master' into memleak2
2016-02-15 15:52:10 +08:00
Nguyen Anh Quynh
e73cbf1c88
arm: UC_QUERY_MODE return hardware mode (see issue #397 )
2016-02-06 09:47:57 +08:00
Nguyen Anh Quynh
20b01a6933
fix merge conflict
2016-02-01 12:08:38 +08:00
danghvu
36e53ad8a1
Fix arm & arm64 memleaks
2016-01-31 16:22:20 -06:00
Nguyen Anh Quynh
c8569d8128
arm: fix change PC feature. now tests/regress/callback-pc.py passes
2016-01-28 16:03:19 +08:00
Nguyen Anh Quynh
5a04bcb115
allow to change PC during callback. this solves issue #210
2016-01-28 14:06:17 +08:00
Nguyen Anh Quynh
48ab148d1c
Merge branch 'hook'
2016-01-26 22:52:29 +08:00
Nguyen Anh Quynh
2341f5dd1a
code style
2016-01-26 17:37:48 +08:00
Nguyen Anh Quynh
6f3d48077e
rename UC_QUERY_ARM_MODE to a more generic name UC_QUERY_MODE. make all bindings support this new constant
2016-01-24 01:08:23 +08:00
Nguyen Anh Quynh
4dbad9aa9b
add new API uc_query() to query internal status of emulator at runtime
2016-01-23 17:14:44 +08:00
Nguyen Anh Quynh
38d1443504
Merge branch 'hook-refactor' of https://github.com/lunixbochs/unicorn into lunixbochs-hook-refactor
2016-01-23 13:24:12 +08:00
Ryan Hileman
2ac1281f82
rework code/block tracing
2016-01-22 19:07:50 -08:00
Nguyen Anh Quynh
249e2ac0a0
Merge branch 'hook-refactor' of https://github.com/lunixbochs/unicorn into lunixbochs-hook-refactor
2016-01-23 10:58:37 +08:00
Ryan Hileman
0886ae8ede
rework code/block tracing
2016-01-22 18:42:27 -08:00
Ryan Hileman
93052f6566
refactor to allow multiple hooks for one type
2016-01-22 18:41:43 -08:00
xorstream
b4b83ff207
moar fixes
2016-01-23 12:56:47 +11:00
xorstream
d8aaa2f44c
Fixes to runtime arm mask checks
2016-01-23 12:44:12 +11:00
xorstream
678d645b80
Fix uc_mode usage in source code
2016-01-23 12:29:22 +11:00
xorstream
8763d426c2
Fix uc_mode usage in source code
2016-01-23 12:08:49 +11:00
Nguyen Anh Quynh
b72671c6d5
sparc, arm, m68k: check for exit request after every hooked instruction
2015-12-20 12:28:15 +08:00
Nguyen Anh Quynh
2f297bdd3a
handle some errors properly so avoid exit() during initialization. this fixes issue #237
2015-11-12 01:43:41 +08:00
Nguyen Anh Quynh
142d3a6f72
arm: allow to read CPSR register
2015-10-17 15:59:27 +08:00
Nguyen Anh Quynh
3ca8774f1a
arm: properly handle the case when first insn in block is until address
2015-09-30 14:42:08 +08:00
Nguyen Anh Quynh
886946dcf4
do not use syscall to quit emulation. this can fix issues #147 & #148
2015-09-26 16:49:00 +08:00
Nguyen Anh Quynh
d7d4be25b1
arm64: early check to see if the address of this block is the until address
2015-09-21 10:26:33 +08:00
Nguyen Anh Quynh
5005b4a6e2
arm: early check to see if the address of this block is the until address
2015-09-17 09:16:57 +07:00
Nguyen Anh Quynh
c1dd9fbfdf
arm64: handle SP register. this fixes issue #122
2015-09-08 08:40:42 +08:00
Nguyen Anh Quynh
3ac8615cbb
arm: handle invalid instruction. this fixes issue #114
2015-09-08 00:43:09 +08:00
Nguyen Anh Quynh
84e3b5c897
cast all the values to write to registers in uc_reg_write() to unsigned type. this fixes issue #98
2015-09-04 11:17:08 +08:00
Jonathon Reinhart
3bd705a060
Merge remote-tracking branch 'upstream/master' into change-handle-based-api
2015-08-30 00:23:51 -04:00
Nguyen Anh Quynh
b335cf016c
do not generate basic-block callback when translation is broken in the middle due to full cache (all the remaining archs)
2015-08-27 21:09:00 +08:00
Jonathon Reinhart
622d5cd5f9
change uch to uc_struct (target-arm)
2015-08-26 09:02:16 -04:00
Jonathon Reinhart
9163bba812
restore mode of .[ch] files
...
These were marked as executable in 5c3b6819
, likely due to a Windows
filesystem being involved. This can be avoided:
http://stackoverflow.com/q/1580596/119527
2015-08-24 21:19:12 -04:00
Chris Eagle
5c3b681945
Add const to uc_reg_write and derivitives
2015-08-24 09:42:50 -07:00
mothran
a167f7c456
renames the register constants so unicorn and capstone can compile together
2015-08-23 21:36:33 -07:00
Nguyen Anh Quynh
344d016104
import
2015-08-21 15:04:50 +08:00