4 commits

Author	SHA1	Message	Date
Pavel Dovgalyuk	342fa7135d	mips: set CP0 Debug DExcCode for SDBBP instruction ... This patch fixes setting DExcCode field of CP0 Debug register when SDBBP instruction is executed. According to EJTAG specification, this field must be set to the value 9 (Bp). Backports commit c6c2c0fc32362ba234ae3bdad1a55c2d6aefaa12 from qemu	2018-03-03 22:45:08 -05:00
Philippe Mathieu-Daudé	65c69e6ccb	target-mips: fix compiler warnings (clang 5) ... static code analyzer complain: target/mips/helper.c:453:5: warning: Function call argument is an uninitialized value qemu_log_mask(CPU_LOG_MMU, ^~~~~~~~~~~~~~~~~~~~~~~~~~ 'physical' and 'prot' are uninitialized if 'ret' is not TLBRET_MATCH. Backports commit def74c0cf05722b2e502d4b4f1219966c5b0cbd3 from qemu	2018-03-02 14:09:55 -05:00
Lioncash	ebae552174	mips: Build fix	2018-03-01 22:56:23 -05:00
Thomas Huth	b2f1326437	Move target-* CPU file into a target/ folder ... We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Backports commit fcf5ef2ab52c621a4617ebbef36bf43b4003f4c0 from qemu	2018-03-01 22:50:58 -05:00

Renamed from qemu/target-mips/helper.c (Browse further)