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1197 commits 7 branches 6 tags 35 MiB
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155 commits

Author SHA1 Message Date
Nguyen Anh Quynh 125f77a460 regress: chmod +x vld.py 2016-05-04 08:42:53 +08:00
Nguyen Anh Quynh 8b95cad550 regress: remove vmov.py 2016-05-04 08:41:09 +08:00
mkravchik 1afbee3a12 Merge pull request #3 from mkravchik/vld 
Vld
 2016-05-03 22:26:00 +03:00
mkravchik 33d105917d Added files via upload 2016-05-03 18:43:39 +03:00
Nguyen Anh Quynh 4084a385c2 regress: add mem_64_c.c from issue #523 by Chris Eagle 2016-04-24 22:53:30 +08:00
Nguyen Anh Quynh df1de25db0 regress: chmod +x write_before_map.py 2016-04-24 18:09:06 +08:00
Tim Blazytko 0e52b913e7 added regression test write_before_map.py 2016-04-24 11:47:04 +02:00
Nguyen Anh Quynh cc6cbc5cf7 Merge branch 'memleak' into m2 2016-04-18 12:48:13 +08:00
practicalswift 06a64dc3b0 Add six crash cases (2 * ARM + 4 * M68K) 
* 001-bad_condition_code_0xe.c (ARM)
* 002-qemu__fatal__unimplemented_control_register_write_0xffb___0x0.c (M68K)
* 003-qemu__fatal__wdebug_not_implemented.c (M68K)
* 004-segmentation_fault_1.c (ARM)
* 005-qemu__fatal__illegal_instruction__0000___00000404.c (M68K)
* 006-qemu__fatal__illegal_instruction__0421___00040026.c (M68K)

```
$ ./001-bad_condition_code_0xe # ARM
uc_emu_start(…)
Bad condition code 0xe
Aborted

$ ./002-qemu__fatal__unimplemented_control_register_write_0xffb___0x0 # M68K
uc_emu_start(…)
hook_code(…) called
qemu: fatal: Unimplemented control register write 0xffb = 0x0

Aborted

$ ./003-qemu__fatal__wdebug_not_implemented # M68K
uc_emu_start(…)
qemu: fatal: WDEBUG not implemented
Aborted

$ ./004-segmentation_fault_1 # ARM
uc_emu_start(…)
hook_code(…) called
Segmentation fault

$ ./005-qemu__fatal__illegal_instruction__0000___00000404 # M68K
uc_emu_start(…)
qemu: fatal: Illegal instruction: 0000 @ 00000404
Aborted

$ ./006-qemu__fatal__illegal_instruction__0421___00040026 # M68K
uc_emu_start(…)
hook_code(…) called
qemu: fatal: Illegal instruction: 0421 @ 00040026
Aborted
```
 2016-04-09 15:27:20 -04:00
Zach Riggle 67ae30a2fb Add test showing failure to track targets properly when single-stepping. 
This issue breaks emulation of conditional instructions on amd64.
 2016-04-05 10:06:39 -07:00
Nguyen Anh Quynh b138393a2b regress: chmod +x translator_buffer.py 2016-04-05 21:40:02 +08:00
Nguyen Anh Quynh 6ee7d22c68 Merge pull request #510 from emdel/master 
test case for the dynmaic translator buffer issue
 2016-04-05 20:37:52 +07:00
emdel 1120a22b4d test case for the dynmaic translator buffer issue 2016-04-05 06:11:21 -07:00
Nguyen Anh Quynh 1486ccce70 regress: fix all the calls to uc_hook_add() following recent change on this API 2016-04-03 23:32:14 +08:00
Nguyen Anh Quynh 4e07e71e04 regress: chmod +x x86_64_eflags.py 2016-03-31 10:06:33 +08:00
Zach Riggle 8cd23bcead Add test case for unicorn-engine/unicorn#499 2016-03-30 21:25:35 -04:00
Sascha Schirra 09784d85c1 bugfix read_reg -> reg_read 2016-03-27 11:26:57 +02:00
Nguyen Anh Quynh 90cefeb167 regress: adapt all C code to latest change in uc_hook_add() API 2016-03-26 00:33:24 +08:00
Nguyen Anh Quynh 08bd4b3f61 regress chmod +x x86_gdt.py tcg_liveness_analysis_bug_issue-287.py 2016-03-25 11:11:32 +08:00
Sascha Schirra 0c49f83cb5 GDT test added 2016-03-22 20:08:15 +01:00
Nguyen Anh Quynh fb1ebac000 Merge branch 'master' into m1 2016-03-09 15:13:42 +08:00
Nguyen Anh Quynh 9c91a6ec28 fix a typo in tests/regress/LICENSE 2016-03-08 08:55:55 +08:00
Hoang-Vu Dang 9d9056c474 Add a license for regression tests 2016-03-07 12:22:20 -06:00
mkravchik 90d15b9a57 Added files via upload 
VMOV emulation fails on ARM (in Thumb mode)
 2016-02-29 14:52:47 +02:00
emdel f010219a0f zf set to 1 2016-02-18 06:29:59 -08:00
emdel 0383db9d27 Added assert 2016-02-18 06:26:01 -08:00
Nguyen Anh Quynh 6e5a3a6d5b regress: chmod +x jumping.py 2016-02-18 21:58:48 +08:00
emdel de5a887ed2 testcase to set ZF and modify eflags 2016-02-17 13:56:20 -08:00
Nguyen Anh Quynh b69feb8d0b Merge branch 'master' into memleak2 2016-02-15 15:52:10 +08:00
coco bfbe91834e two more testcases 2016-02-11 15:02:14 +01:00
Nguyen Anh Quynh 07e8f2f60d Merge pull request #423 from lunixbochs/master 
add regress for #421
 2016-02-05 09:45:01 +08:00
Ryan Hileman bcfa41c90d add regress for #421 2016-02-05 02:35:17 +01:00
Nguyen Anh Quynh 9b6d1bf324 regress: fix compilation warning for mem_fuzz.c 2016-02-05 08:54:52 +08:00
Nguyen Anh Quynh a5d9daaef4 Merge branch 'mem_fuzzing' of https://github.com/eqv/unicorn into eqv-mem_fuzzing 2016-02-05 08:49:18 +08:00
coco 1e13777c91 added memory fuzzer and 2 resulting testcases 2016-02-04 19:57:20 +01:00
Nguyen Anh Quynh 101f14285a chmod +x arm_init_input_crash.py 2016-02-03 09:20:15 +08:00
McLovi9 ac806d3bfb Create arm_init_input_crash.py 2016-02-02 20:36:36 +01:00
Nguyen Anh Quynh 20b01a6933 fix merge conflict 2016-02-01 12:08:38 +08:00
xorstream 7973f6b4c9 Added mode endian flags for sparc tests and fixed mode in sparc_jump_to_zero.c 2016-01-25 13:50:26 +11:00
xorstream 26d3b1e7d6 Added ppc 32bit mode and added sparc mode checks to bring it in line with other archs 2016-01-24 22:27:33 +11:00
Nguyen Anh Quynh d79925f477 sparc: add SPARC32 mode (= UC_MODE_32) 2016-01-23 10:48:18 +08:00
Nguyen Anh Quynh 5c6c67bb3a regress: fix Sparc mode for sparc_reg.py 2016-01-23 10:17:42 +08:00
xorstream 8763d426c2 Fix uc_mode usage in source code 2016-01-23 12:08:49 +11:00
Nguyen Anh Quynh d0125eb8bf regress: add invalid_write.py to test issue #371 2016-01-13 11:35:09 +08:00
Nguyen Anh Quynh 7de48f2f75 regress: add emu_clear_errors to .gitignore 2016-01-12 01:02:45 +08:00
Nguyen Anh Quynh e1fe63ae13 regress: fix compilation warnings for emu_clear_errors.c 2016-01-12 00:37:15 +08:00
Nguyen Anh Quynh fa430b4ad4 Merge branch 'test/issue-351' of https://github.com/williballenthin/unicorn into williballenthin-test/issue-351 2016-01-12 00:22:33 +08:00
Willi Ballenthin a9d4b4cfa7 add test case in C demonstrating issue 351 2016-01-11 09:57:13 -05:00
Nguyen Anh Quynh f4a5273ce7 Merge pull request #365 from williballenthin/test/issue-351 
add test case demonstrating issue 351
 2016-01-11 16:13:52 +08:00
Ryan Hileman b6db70808d add regress for #366 2016-01-10 23:51:11 -08:00