Commit graph

5376 commits

Author SHA1 Message Date
Richard Henderson 0a8bc142d3
tcg/aarch64: Fold away noaddr branch routines
There are one use apiece for these. There is no longer a need for
preserving branch offset operands, as we no longer re-translate.

Backports commit 733589b3382afcb0ae9f43e72e083a5ddd38abd5 from qemu
2018-12-18 05:15:41 -05:00
Richard Henderson cbe1065e83
tcg/aarch64: Remove reloc_pc26_atomic
It is unused since b68686bd4bfeb70040b4099df993dfa0b4f37b03.

Backports commit 90d6cb781130891f96eb54f8315e29fbd4e99a71 from qemu
2018-12-18 05:14:22 -05:00
Richard Henderson 091b4fa1ff
tcg/i386: Move TCG_REG_CALL_STACK from define to enum
Backports commit 66c0285df4270d184afce5ac8b97ac175c89562f from qemu
2018-12-18 05:13:47 -05:00
Richard Henderson f3a8a4a306
tcg/i386: Always use %ebp for TCG_AREG0
For x86_64, this can remove a REX prefix resulting in smaller code
when manipulating globals of type i32, as we move them between backing
store via cpu_env, aka TCG_AREG0.

Backports commit 5740d9f714835964873325d1210b26811252843f from qemu
2018-12-18 05:13:05 -05:00
Richard Henderson 7ab51fc012
target/sparc: Remove the constant pool
Partially reverts ab20bdc1162. The 14-bit displacement that we
allowed to reach the constant pool is not always sufficient.
Retain the tb-relative addressing, as that is how most return
values from the tb are computed.

Backports commit f6823cbe3787aa47db62deede6683077e3da9a2c from qemu
2018-12-18 05:12:11 -05:00
Peter Maydell b9d5e1d927
target/arm: Free name string in ARMCPRegInfo hashtable entries'
When we add a new entry to the ARMCPRegInfo hash table in
add_cpreg_to_hashtable(), we allocate memory for tehe
ARMCPRegInfo struct itself, and we also g_strdup() the
name string. So the hashtable's value destructor function
must free the name string as well as the struct.

Spotted by clang's leak sanitizer. The leak here is a
small one-off leak at startup, because we don't support
CPU hotplug, and so the only time when we destroy
hash table entries is for the case where ARM_CP_OVERRIDE
means we register a wildcard entry and then override it later.

Backports commit ac87e5072e2cbfcf8e80caac7ef43ceb6914c7af from qemu
2018-12-18 05:09:59 -05:00
Marc-André Lureau 67596f7485
qapi: Do not define enumeration value explicitly
The generated C enumeration types explicitly set the enumeration
constants to 0, 1, 2, ... That's exactly what you get when you don't
supply values.

Drop the explicit values. No change now, but it will avoid gaps in
the values when we later add support for 'if' conditions. Avoiding
such gaps will save us the trouble of changing the ENUM_lookup[]
tables to work without a sentinel.

We'll have to take care to ensure the headers required by the 'if'
conditions get always included before the generated QAPI code.
Fortunately, our convention to include "qemu/osdep.h" first in any .c
ensures that's the case for our CONFIG_FOO macros

Backports commit 9c2f56e9f9d5a1f9ddac77dda35f997738e85d11 from qemu
2018-12-18 05:03:22 -05:00
Marc-André Lureau 5998dbcd67
qapi: rename QAPISchemaEnumType.values to .members
Rename QAPISchemaEnumType.values and related variables to members.
Makes sense ever since commit 93bda4dd4 changed .values from list of
string to list of QAPISchemaMember. Obvious no-op.

Backports commit 57516863644817ca59fab023e0c68d139929f3e0 from qemu
2018-12-18 05:02:35 -05:00
David Hildenbrand 8f69c83634
qapi: Rewrite string-input-visitor's integer and list parsing
The input visitor has some problems right now, especially
- unsigned type "Range" is used to process signed ranges, resulting in
inconsistent behavior and ugly/magical code
- uint64_t are parsed like int64_t, so big uint64_t values are not
supported and error messages are misleading
- lists/ranges of int64_t are accepted although no list is parsed and
we should rather report an error
- lists/ranges are preparsed using int64_t, making it hard to
implement uint64_t values or uint64_t lists
- types that don't support lists don't bail out
- visiting beyond the end of a list is not handled properly
- we don't actually parse lists, we parse *sets*: members are sorted,
and duplicates eliminated

So let's rewrite it by getting rid of usage of the type "Range" and
properly supporting lists of int64_t and uint64_t (including ranges of
both types), fixing the above mentioned issues.

Lists of other types are not supported and will properly report an
error. Virtual walks are now supported.

Tests have to be fixed up:
- Two BUGs were hardcoded that are fixed now
- The string-input-visitor now actually returns a parsed list and not
an ordered set.

Please note that no users/callers have to be fixed up. Candidates using
visit_type_uint16List() and friends are:
- backends/hostmem.c:host_memory_backend_set_host_nodes()
-- Code can deal with duplicates/unsorted lists
- numa.c::query_memdev()
-- via object_property_get_uint16List(), the list will still be sorted
and without duplicates (via host_memory_backend_get_host_nodes())
- qapi-visit.c::visit_type_Memdev_members()
- qapi-visit.c::visit_type_NumaNodeOptions_members()
- qapi-visit.c::visit_type_RockerOfDpaGroup_members
- qapi-visit.c::visit_type_RxFilterInfo_members()
-- Not used with string-input-visitor.

Backports commit c9fba9de89db51a07689e2cba4865a1e564b8f0f from qemu
2018-12-18 04:57:25 -05:00
David Hildenbrand d2e0fae69b
qapi: Fix string-input-visitor to reject NaN and infinities
The string-input-visitor happily accepts NaN and infinities when parsing
numbers (doubles). They shouldn't. Fix that.

Also, add two test cases, testing if "NaN" and "inf" is properly
rejected.

Backports commit 4b69d4c3d7c133ebc9393ef3f86ce38831921cb6 from qemu
2018-12-18 04:49:36 -05:00
David Hildenbrand 67f9141b13
cutils: Fix qemu_strtosz() & friends to reject non-finite sizes
qemu_strtosz() & friends reject NaNs, but happily accept infinities.
They shouldn't. Fix that.

The fix makes use of qemu_strtod_finite(). To avoid ugly casts,
change the @end parameter of qemu_strtosz() & friends from char **
to const char **.

Also, add two test cases, testing that "inf" and "NaN" are properly
rejected. While at it, also fixup the function documentation.

Backports commit af02f4c5179675ad4e26b17ba26694a8fcde17fa from qemu
2018-12-18 04:48:12 -05:00
David Hildenbrand bf15f4924b
cutils: Add qemu_strtod() and qemu_strtod_finite()
Let's provide a wrapper for strtod().

Backports commit ca28f5481607e5c59481e70e429f5dd23662cb69 from qemu
2018-12-18 04:45:19 -05:00
Richard Henderson 8816550c10
target/arm: Implement the ARMv8.1-LOR extension
Provide a trivial implementation with zero limited ordering regions,
which causes the LDLAR and STLLR instructions to devolve into the
LDAR and STLR instructions from the base ARMv8.0 instruction set.

Backports commit 2d7137c10fafefe40a0a049ff8a7bd78b66e661f from qemu
2018-12-18 04:36:58 -05:00
Richard Henderson 32208e482b
target/arm: Use arm_hcr_el2_eff more places
Since arm_hcr_el2_eff includes a check against
arm_is_secure_below_el3, we can often remove a
nearby check against secure state.

In some cases, sort the call to arm_hcr_el2_eff
to the end of a short-circuit logical sequence.

Backports commit 7c208e0f4171c9e2cc35efc12e1bf264a45c229f from qemu
2018-12-18 04:33:07 -05:00
Richard Henderson 78798d10eb
target/arm: Introduce arm_hcr_el2_eff
Replace arm_hcr_el2_{fmo,imo,amo} with a more general routine
that also takes SCR_EL3.NS (aka arm_is_secure_below_el3) into
account, as documented for the plethora of bits in HCR_EL2.

Backports commit f77784446045231f7dfa46c9b872091241fa1557 from qemu
2018-12-18 04:27:34 -05:00
Richard Henderson 4515df5ee7
target/arm: Implement the ARMv8.2-AA32HPD extension
The bulk of the work here, beyond base HPD, is defining the
TTBCR2 register. In addition we must check TTBCR.T2E, which
is not present (RES0) for AArch64.

Backports commit ab638a328fd099ba0b23c8c818eb39f2c35414f3 from qemu
2018-12-18 04:23:37 -05:00
Richard Henderson 3cfd660814
target/arm: Implement the ARMv8.1-HPD extension
Since the TCR_*.HPD bits were RES0 in ARMv8.0, we can simply
interpret the bits as if ARMv8.1-HPD is present without checking.
We will need a slightly different check for hpd for aarch32.

Backports commit 037c13c5904f5fc67bb0ab7dd91ae07347aedee9 from qemu
2018-12-18 04:20:39 -05:00
Richard Henderson 0e08c37773
target/arm: Tidy scr_write
Because EL3 has a fixed execution mode, we can properly decide
which of the bits are RES{0,1}.

Backports commit ea22747c63c9a894777aa41a7af85c3d08e39f81 from qemu
2018-12-18 04:18:09 -05:00
Richard Henderson 52ac2b2f7c
target/arm: Fix HCR_EL2.TGE check in arm_phys_excp_target_el
The enable for TGE has already occurred within arm_hcr_el2_amo
and friends. Moreover, when E2H is also set, the sense is
supposed to be reversed, which has also already occurred within
the helpers.

Backports commit 619959c3583dad325c36f09ce670e7d091382cae from qemu
2018-12-18 04:17:08 -05:00
Richard Henderson a8fb6fc8d5
target/arm: Add SCR_EL3 bits up to ARMv8.5
Post v8.4 bits taken from SysReg_v85_xml-00bet8.

Backports commit 99f8f86d365701fad695be606266aa7dac97ca1c from qemu
2018-12-18 04:16:30 -05:00
Richard Henderson ad27526b58
target/arm: Add HCR_EL2 bits up to ARMv8.5
Post v8.3 bits taken from SysReg_v85_xml-00bet8.

Backports commit 099bf53b7a4bf69f4c4007c769895263a9c3f6f4 from qemu
2018-12-18 04:15:50 -05:00
Peter Maydell 8b69824de7
target/arm: Move id_aa64mmfr* to ARMISARegisters
At the same time, define the fields for these registers,
and use those defines in arm_pamax().

Backports commit 3dc91ddbc68391f934bf6945853e99cf6810fc00 from qemu
2018-12-18 04:03:50 -05:00
Thomas Huth 7855f9acf0
Remove QEMU_ARTIFICIAL macro
The code that used it has already been removed a while ago with commit
dc41aa7d34989b552ef ("tcg: Remove GET_TCGV_* and MAKE_TCGV_*").

Backports commit 78751ea855f89b5a352ccc332162fed3ad4c9496 from qemu
2018-12-18 03:56:48 -05:00
Thomas Huth c584171cf8
includes: Replace QEMU_GNUC_PREREQ with "__has_builtin || !defined(__clang__)"
Since we require GCC version 4.8 or newer now, we can be sure that
the builtin functions are always available on GCC. And for Clang,
we can check the availablility with __has_builtin instead.

Backports commit f773b423cc61f3ca18af5337101c158a52aaae2c from qemu
2018-12-18 03:55:43 -05:00
Thomas Huth 3ba2114043
tcg/tcg.h: Remove GCC check for tcg_debug_assert() macro
Both GCC v4.8 and Clang v3.4 (our minimum versions) support
__builtin_unreachable(), so we can remove the version check here now.

Backports commit 6fa2cef205a60b5c5c3b058f53852416b885c455 from qemu
2018-12-18 03:53:56 -05:00
Thomas Huth 3fa5a557eb
configure: Remove old -fno-gcse workaround for GCC 4.6.x and 4.7.[012]
Now that we require at least GCC 4.8, we don't need this als workaround
for 4.6 and 4.7 anymore.

Backports commit d376e9de07e9541a040609d30b73403c33b6afe0 from qemu
2018-12-18 03:52:36 -05:00
Thomas Huth b3020122a9
configure: Remove obsolete check for Clang < 3.2
Since we have got a check for Clang >= 3.4 now, we do not need to
check for older Clang versions in the configure test for 128-bit ints
anymore.

Backports commit 40f87e2680a3fda6117a08db9106a01345806a66 from qemu
2018-12-18 03:51:25 -05:00
Thomas Huth 71b00516c1
configure: Add a test for the minimum compiler version
So far we only had implicit requirements for the minimum compiler version,
e.g. we require at least GCC 4.1 for the support of atomics. However,
such old compiler versions are not tested anymore by the developers, so
they are not really supported anymore. Since we recently declared explicitly
what platforms we intend to support, we can also get more explicit on the
compiler version now. The supported distributions use the following version
of GCC:

RHEL-7: 4.8.5
Debian (Stretch): 6.3.0
Debian (Jessie): 4.8.4
OpenBSD (ports): 4.9.4
FreeBSD (ports): 8.2.0
OpenSUSE Leap 15: 7.3.1
Ubuntu (Xenial): 5.3.1
macOS (Homebrew): 8.2.0

So we can safely assume GCC 4.8 these days. For Clang, the situation is
a little bit more ambiguous, since it is sometimes not available in the
main distros but rather third party repositories. At least Debian Jessie
uses version 3.5, and EPEL7 for RHEL7 uses 3.4, so let's use 3.4 as
minimum Clang version now - we still can adjust this later if necessary.

Unfortunately Apple uses different version numbers for the Clang that is
included in their Xcode suite, so we need to check the version numbers
for Xcode separately. Xcode 5.1 seems to be the first one that has been
shipped with LLVM 3.4, so use this version as the minimum there.

Backports commit efc6c070acabd92283f8786cc835684d09def12f from qemu
2018-12-18 03:50:25 -05:00
Eduardo Habkost 030aa55c08
i386: Add stibp flag name
The STIBP flag may be supported by the host KVM module, so QEMU
can allow it to be configured manually, and it can be exposed to
guests when using "-cpu host".

No additional migration code is required because the whole
contents of spec_ctrl is already migrated in the "cpu/spec_ctrl"
section.

Backports commit 0e8916582991b9fd0b94850a8444b8b80d0a0955 from qemu
2018-12-18 03:48:53 -05:00
Liu Jingqi 10d7f18674
x86/cpu: Enable MOVDIR64B cpu feature
MOVDIR64B moves 64-bytes as direct-store with 64-bytes write atomicity.
Direct store is implemented by using write combining (WC) for writing
data directly into memory without caching the data.

The bit definition:
CPUID.(EAX=7,ECX=0):ECX[bit 28] MOVDIR64B

The release document ref below link:
https://software.intel.com/sites/default/files/managed/c5/15/\
architecture-instruction-set-extensions-programming-reference.pdf

Backports commit 1c65775ffc2dbd276a8bffe592feba0e186a151c from qemu
2018-12-18 03:48:19 -05:00
Liu Jingqi 6aa3cd24fd
x86/cpu: Enable MOVDIRI cpu feature
MOVDIRI moves doubleword or quadword from register to memory through
direct store which is implemented by using write combining (WC) for
writing data directly into memory without caching the data.

The bit definition:
CPUID.(EAX=7,ECX=0):ECX[bit 27] MOVDIRI

The release document ref below link:
https://software.intel.com/sites/default/files/managed/c5/15/\
architecture-instruction-set-extensions-programming-reference.pdf

Backports commit 24261de4916596d8ab5f5fee67e9e7a19e8325a5 from qemu
2018-12-18 03:46:49 -05:00
Gerd Hoffmann 94c8893678
move ObjectClass to typedefs.h
Backports commit 7cfda775e575e9561043c26853b4ca6f891cce70 from qemu
2018-12-11 20:37:04 -05:00
David Hildenbrand d783407cff
range: pass const pointer where possible
If there are no changes, let's use a const pointer.

Backports commit d56978f41b357cc84f2d3fe7d5fef2ae9cddfa61 from qemu
2018-12-11 20:35:26 -05:00
Peter Maydell c53f666160
Open 4.0 development tree
Backports commit ab694df6f0f01fca3e2d1e7fca770e3b65cb4a73 from qemu
2018-12-11 20:33:45 -05:00
Peter Maydell f8b6f2493b
Update version for v3.1.0-rc5 release
Backports commit 4f818e7b7f8ecb5c166d093b8859fec2ddeca2ef from qemu
2018-12-10 01:46:21 -05:00
Peter Maydell 8aa948553e
Update version for v3.1.0-rc3 release
Backports commit 4750e1a888ac3d320607f33b676f299005be98e6 from qemu
2018-12-01 20:14:28 -05:00
Richard Henderson 2af9cf7113
target/i386: Generate #UD when applying LOCK to a register destination
Fixes a TCG crash due to attempting the atomic operation without
having set up the address first. This does not attempt to fix
all of the other missing checks for LOCK.

Fixes: a7cee522f35
Fixes: https://bugs.launchpad.net/qemu/+bug/1803160

Backports commit e84fcd7f662a0d8198703f6f89416d7ac2c32767 from qemu
2018-12-01 20:13:02 -05:00
Peter Maydell 9b5f4d32ba
Update version for v3.1.0-rc2 release
Backports commit 47c1cc30e440860aa695358f7c2dd0b9d7b53d16 from qemu
2018-11-23 18:58:52 -05:00
Luc Michel 1ae9d988c6
target/arm: fix smc incorrectly trapping to EL3 when secure is off
This commit fixes a case where the CPU would try to go to EL3 when
executing an smc instruction, even though ARM_FEATURE_EL3 is false. This
case is raised when the PSCI conduit is set to smc, but the smc
instruction does not lead to a valid PSCI call.

QEMU crashes with an assertion failure latter on because of incoherent
mmu_idx.

This commit refactors the pre_smc helper by enumerating all the possible
way of handling an scm instruction, and covering the previously missing
case leading to the crash.

The following minimal test would crash before this commit:

.global _start
.text
_start:
ldr x0, =0xdeadbeef ; invalid PSCI call
smc #0

run with the following command line:

aarch64-linux-gnu-gcc -nostdinc -nostdlib -Wl,-Ttext=40000000 \
-o test test.s

qemu-system-aarch64 -M virt,virtualization=on,secure=off \
-cpu cortex-a57 -kernel test

Backports commit 7760da729ac88f112f98f36395ac3b55fc9e4211 from qemu
2018-11-23 18:57:23 -05:00
Aleksandar Markovic d1f2d2c57b
target/mips: Disable R5900 support
Disable R5900 support. There are some outstanding issues related
to ABI support and emulation accuracy, that were not understood
well during review process. Disable to avoid backward compatibility
issues.

Reverts commit ed4f49ba9bb56ebca6987b1083255daf6c89b5de.

Backports commit 823f2897bdd78185f3ba33292a25105ba8bad1b5 from qemu
2018-11-23 18:55:12 -05:00
Aleksandar Markovic 3b89ca7188
target/mips: Rename MMI-related functions
Rename MMI-related functions.

Backports commit 874b28797045f574adb10b69c28006ca143f9280 from qemu
2018-11-23 18:54:02 -05:00
Aleksandar Markovic f51b980772
target/mips: Rename MMI-related opcodes
Rename MMI-related opcodes.

Backports commit baa609db75057b6a84c1867049e85d553b990090 from qemu
2018-11-23 18:49:13 -05:00
Aleksandar Markovic 8f8c6e3bb5
target/mips: Rename MMI-related masks
Rename MMI-related masks.

Backports commit c8341e00007f51e777b8b00b3fc3f475b3684001 from qemu
2018-11-23 18:41:55 -05:00
Fredrik Noring ed586cfa46
target/mips: Guard check_insn with INSN_R5900 check
Explicitely mark handling of PREF instruction for R5900 as
treating the same as NOP.

Backports commit 992e8176d36882983bb04f0259f7151a36d003a1 from qemu
2018-11-23 18:39:37 -05:00
Fredrik Noring a79d4b6fe7
target/mips: Guard check_insn_opc_user_only with INSN_R5900 check
Avoid using check_opc_user_only() as a decision making code wrt
various architectures. Use ctx->insn_flags checks instead.

Backports commit 55fc7a69aa38f5ec726e862caf4e4394caca04a8 from qemu
2018-11-23 18:38:08 -05:00
Fredrik Noring b671293fe0
target/mips: Fix decoding mechanism of special R5900 opcodes
MOVN, MOVZ, MFHI, MFLO, MTHI, MTLO, MULT, MULTU, DIV, DIVU, DMULT,
DMULTU, DDIV, DDIVU and JR are decoded in decode_opc_special_tx79
instead of the generic decode_opc_special_legacy.

Backports commit 9dc324ce66807cc231fe890d4031de595ad1cf72 from qemu
2018-11-23 18:35:55 -05:00
Fredrik Noring f23c6fd006
target/mips: Fix decoding mechanism of R5900 DIV1 and DIVU1
DIV1 and DIVU1 are generated in gen_div1_tx79 instead of the generic
gen_muldiv.

Backports commit c42171c3bfe6fdc94c183f664c4d6548f8c5488b from qemu
2018-11-23 18:33:35 -05:00
Fredrik Noring 3d637206bd
target/mips: Fix decoding mechanism of R5900 MFLO1, MFHI1, MTLO1 and MTHI1
MFLO1, MFHI1, MTLO1 and MTHI1 are generated in gen_HILO1_tx79 instead of
the generic gen_HILO.

Backports commit 86efbfb619a42061ac6439c074cfbf52df2ef2c2 from qemu
2018-11-23 18:29:01 -05:00
Peter Maydell 578172212f
Update version for v3.1.0-rc1 release
Backports commit cb968d275c145467c8b385a3618a207ec111eab1 from qemu
2018-11-16 22:00:34 -05:00
Peter Maydell 900747236f
target/arm/cpu: Give Cortex-A15 and -A7 the EL2 feature
The Cortex-A15 and Cortex-A7 both have EL2; now we've implemented
it properly we can enable the feature bit.

Backports commit 436c0cbbeb38dd97c02fe921a7cb253a18afdd86 from qemu
2018-11-16 21:59:55 -05:00