xorstream
b4b83ff207
moar fixes
2016-01-23 12:56:47 +11:00
xorstream
d8aaa2f44c
Fixes to runtime arm mask checks
2016-01-23 12:44:12 +11:00
xorstream
678d645b80
Fix uc_mode usage in source code
2016-01-23 12:29:22 +11:00
xorstream
8763d426c2
Fix uc_mode usage in source code
2016-01-23 12:08:49 +11:00
Nguyen Anh Quynh
6490b4f2a9
arm64: fix the issue of multiple definition of aarch64_tb_set_jmp_target (issue #387 )
2016-01-22 22:44:18 +08:00
Nguyen Anh Quynh
309abbe453
remove qemu/config-all-disas.mak
2016-01-22 17:11:57 +08:00
Nguyen Anh Quynh
3eb51116b9
arm64: fix the access to tcg_op_defs[] in arm64 backend (issue #387 )
2016-01-22 11:35:01 +08:00
Nguyen Anh Quynh
840eb54f05
Revert "arm64: fix the access to tcg_op_defs[] in arm64 backend (issue #387 )"
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This reverts commit 3000ca6abf
.
2016-01-22 11:33:36 +08:00
Nguyen Anh Quynh
3000ca6abf
arm64: fix the access to tcg_op_defs[] in arm64 backend (issue #387 )
2016-01-22 11:33:28 +08:00
Nguyen Anh Quynh
07bd81bda6
do not redefine tb_set_jmp_target1. this partly fixes issue #387
2016-01-22 11:29:22 +08:00
Nguyen Anh Quynh
839ef672b0
only declare use_idiv_instructions_rt when __ARM_ARCH_EXT_IDIV__ is not defined
2016-01-19 00:19:28 +08:00
Nguyen Anh Quynh
3b52af4fbd
avoid confusion between macro & variable use_idiv_instructions (ARM backend)
2016-01-18 23:53:50 +08:00
Nguyen Anh Quynh
d9249b91c2
add some missing symbols for ARM backend
2016-01-18 20:42:45 +08:00
petevine
8db7f79daf
Finish adding getauxval
2016-01-18 12:48:49 +01:00
petevine
1bf85461c2
Add getauxval.c back
2016-01-18 12:47:32 +01:00
Nguyen Anh Quynh
7695fb1578
x86: no need to reset env->invalid_error in x86_reg_reset() as we always do that in cpu_exec()
2016-01-12 01:01:11 +08:00
farmdve
c9f4bd27cc
Reset env->invalid_error before executing a translation block.
2016-01-11 18:12:57 +02:00
Nguyen Anh Quynh
13726b3d40
Merge branch 'master' into cygwin
2016-01-07 23:17:32 +07:00
farmdve
2304bbfc96
Remove more instances of tcg_register_jit
2016-01-07 16:39:41 +02:00
Nguyen Anh Quynh
bfeb08d1ba
fix some compilation warning
2016-01-06 14:11:21 +08:00
Nguyen Anh Quynh
e8a295991f
update qemu/header_gen.py
2016-01-06 00:44:29 +07:00
Nguyen Anh Quynh
e0cb02569e
remove unused tcg_register_jit() and related code
2016-01-05 16:02:34 +07:00
Nguyen Anh Quynh
075ccadbe9
x86: set s->pc in disas_insn() early to fix uninitialized read issue. bug reported by @farmdve
2016-01-03 08:25:51 +07:00
Nguyen Anh Quynh
19930b0514
spaces
2016-01-01 14:15:01 +08:00
Nguyen Anh Quynh
b3ebd1b7cb
Merge branch 'master' of https://github.com/iroiro123/unicorn into iroiro123-master
2016-01-01 14:01:39 +08:00
Nguyen Anh Quynh
f935469658
mips: handle memory redirect for all APIs. this fixes issue #347
2015-12-28 15:19:30 +08:00
Nguyen Anh Quynh
f10d79e95f
x86: fix a compilation warning on unused variable
2015-12-28 13:06:25 +08:00
Nguyen Anh Quynh
b5feddbf1e
indentation
2015-12-28 13:04:59 +08:00
Nguyen Anh Quynh
99b401c609
Merge branch 'la-fixed' of https://github.com/JCYang/unicorn into JCYang-la-fixed
2015-12-28 12:21:31 +08:00
Spl3en
bb375e4fa9
Reset correctly the register CR0 in protected mode by calling cpu_x86_update_cr0 instead of setting it manually.
2015-12-25 04:55:15 +01:00
Spl3en
9ca993d8aa
Restore the protected mode check.
2015-12-24 18:39:19 +01:00
Spl3en
4c3ad139ea
( Fix #341 ) SYSENTER instruction is not properly hooked with uc_hook_add in x86 emulation.
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helper_sysenter in qemu/target-i386/seg_helper.c didn't check properly if a call interrupt callback was registred.
It has been fixed by copying the helper_syscall behavior.
2015-12-24 16:00:22 +01:00
Nguyen Anh Quynh
ed319bda0b
x86: identity map guest address to host address. this fixes issue #300
2015-12-24 09:51:17 +08:00
Nguyen Anh Quynh
4117a111eb
mips: handle hook callback for blikely instruction properly. this fixes issue #330 , #331
2015-12-23 01:40:03 +08:00
JC Yang
8ef018a2cb
Fix possible wrong conditional branch in generated host code by fixing
...
the tcg_liveness_analysis().
Refer to https://github.com/unicorn-engine/unicorn/issues/287 for further info.
2015-12-21 18:01:01 +08:00
Hiroyuki Uekawa
6445c80b29
Build for Cygwin
2015-12-20 22:00:35 +09:00
Nguyen Anh Quynh
b72671c6d5
sparc, arm, m68k: check for exit request after every hooked instruction
2015-12-20 12:28:15 +08:00
Nguyen Anh Quynh
4f268febb4
mips: check for exit request after every hooked instruction. this fix issue #329
2015-12-20 12:23:36 +08:00
Nguyen Anh Quynh
771f9f7c3b
fix conflicts when merging map-ptr branch to master branch
2015-12-17 08:12:02 +08:00
Nguyen Anh Quynh
8d3265d9e1
mips: remove unused variable is_bc_slot
2015-12-16 23:06:17 +08:00
xorstream
395251d3e8
Fix codehook for MIPS instructions in delay slot
2015-12-15 17:02:56 +11:00
Nguyen Anh Quynh
74aeef217c
Merge branch 'master' of https://github.com/unicorn-engine/unicorn
2015-12-13 13:11:54 +08:00
Nguyen Anh Quynh
bc63102e50
mips: only patch instruction size when there is a callback on the instruction. this fixes issue #282
2015-12-13 13:11:40 +08:00
farmdve
8b79a872d0
Fix segfault introduced in my previous commits.
2015-12-11 22:35:25 +02:00
Nguyen Anh Quynh
f21fa3d966
do not flush TB when l1_map is uninitialized. this fixes issue #280 , #284
2015-12-12 03:09:38 +08:00
Nguyen Anh Quynh
a142611f56
sparc: set compute functions for icc_table[] & xcc_table[]. this fixes issue #289
2015-12-12 00:41:09 +08:00
Nguyen Anh Quynh
74986cc59a
g_free() can handle NULL pointer
2015-12-11 11:25:35 +08:00
farmdve
3e57615c76
Fix uc_mem_unmap memory leak and in uc_close.
...
It appears the problem is that we are not calling the memory region
destructor. After modifying memory_unmap to include the destructor call
for the memory region, the memory is freed.
Furthermore in uc_close we must explicitly free any blocks that were not
unmapped by the user to prevent leaks.
This should fix issue 305.
2015-12-11 02:42:31 +02:00
Ryan Hileman
230cbd5330
add permissions to map_ptr api
2015-11-28 11:28:31 -08:00
Nguyen Anh Quynh
4a759cebb5
set permission for memory region allocated by memory_map_ptr(). this fixes the segfault in sample_x86.c, function test_x86_map_ptr()
2015-11-28 17:11:27 +08:00