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2939 commits 7 branches 6 tags 35 MiB
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32 commits

Author SHA1 Message Date
Lioncash 1c04024688
tcg: Make cpu_regs_sparc a TCGv array 2018-02-21 01:50:28 -05:00
Lioncash db114261e3
target-sparc: Cleanup casts and unnessecary alloc/dealloc 2018-02-21 01:44:51 -05:00
Lioncash c0210ac8a6
tcg: Make cpu_wim a TCGv 2018-02-21 01:41:53 -05:00
Lioncash e5401deb09
tcg: Make cpu_npc a TCGv 2018-02-21 01:25:40 -05:00
Lioncash 6ccd4479d7
tcg: Make sparc_cpu_pc a TCGv 2018-02-21 01:23:58 -05:00
Lioncash e5a776b495
tcg: Make cpu_fsr a TCGv 2018-02-21 01:22:16 -05:00
Lioncash 4da2fd6407
tcg: Make cpu_cond a TCGv 
Commit 5d4e1a1081d3f1ec2908ff0eaebe312389971ab4
allows making the type concrete
 2018-02-21 01:12:15 -05:00
Lioncash 2f785b11d2
tcg: Make cpu_tbr a TCGv 
Commit 5d4e1a1081d3f1ec2908ff0eaebe312389971ab4
allows making the type concrete
 2018-02-21 01:12:11 -05:00
Lioncash bbc8517cd2
tcg: Make cpu_y a TCGv 
Commit 5d4e1a1081d3f1ec2908ff0eaebe312389971ab4
allows making the type concrete
 2018-02-21 01:06:36 -05:00
Richard Henderson d609ab30c2
target-sparc: Use global registers for the register window 
Via indirection off cpu_regwptr.

Backports commit d2dc4069e046deeccc4dca0f73c3077ac22ba43f from qemu
 2018-02-20 20:34:42 -05:00
xorstream 1aeaf5c40d This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
Chris Eagle fccbcfd4c2 revert to use of g_free to make future qemu integrations easier (#695) 
* revert to use of g_free to make future qemu integrations easier

* bracing
 2016-12-21 22:28:36 +08:00
Chris Eagle e46545f722 remove glib dependency by provide compatible replacements 2016-12-18 14:56:58 -08:00
Nguyen Anh Quynh b7cdbe7a88 Merge branch 'feat/reg_save_restore' of https://github.com/rhelmot/unicorn into rhelmot-feat/reg_save_restore 2016-10-07 09:57:07 +08:00
danghvu 84d99412bc memleak: Fix Sparc memory leak 2016-10-03 14:23:27 -05:00
Ryan Hileman cb615fdba7 remove uc->cpus 2016-09-23 07:38:21 -07:00
Andrew Dutcher 0ef2b5fd71 New feature: registers can be bulk saved/restored in an opaque blob 2016-08-20 04:14:07 -07:00
Ryan Hileman acd88856e1 add batched reg access 2016-04-04 20:51:38 -07:00
Hiroyuki UEKAWA c5888e5670 move macros in qemu/target-*/unicorn*.c to uc_priv.h 2016-03-02 12:43:02 +09:00
Nguyen Anh Quynh 5a04bcb115 allow to change PC during callback. this solves issue #210 2016-01-28 14:06:17 +08:00
Nguyen Anh Quynh d6b9c31dc9 sparc: more cleanup 2015-09-16 16:04:12 +07:00
mothran f4894a1c77 removed unneed cases in the switch statement 2015-09-14 20:44:50 -07:00
mothran 6b521e9e9b update the sparc reg read/write to include o/l/i registers 2015-09-14 20:03:32 -07:00
mothran 7dc41a8e4e update the regwptr upon reset 2015-09-13 18:10:28 -07:00
mothran 657a6c3e25 modified the sparc reg get/set functions to use the current reg window ptr 2015-09-12 10:29:35 -07:00
mothran afecfee565 added SPARC sp / fp registers, also updated uint32_t's to uint64_t's in SPARC64 2015-09-10 23:20:52 -07:00
Nguyen Anh Quynh 84e3b5c897 cast all the values to write to registers in uc_reg_write() to unsigned type. this fixes issue #98 2015-09-04 11:17:08 +08:00
Jonathon Reinhart e7a8eb8976 change uch to uc_struct (target-sparc) 2015-08-26 09:02:16 -04:00
Jonathon Reinhart 9163bba812 restore mode of .[ch] files 
These were marked as executable in 5c3b6819, likely due to a Windows
filesystem being involved. This can be avoided:
http://stackoverflow.com/q/1580596/119527
 2015-08-24 21:19:12 -04:00
Chris Eagle 5c3b681945 Add const to uc_reg_write and derivitives 2015-08-24 09:42:50 -07:00
mothran a167f7c456 renames the register constants so unicorn and capstone can compile together 2015-08-23 21:36:33 -07:00
Nguyen Anh Quynh 344d016104 import 2015-08-21 15:04:50 +08:00