Richard Henderson
dc087c4c0c
target/riscv: Merge argument sets for insn32 and insn16
...
In some cases this allows us to directly use the insn32
translator function. In some cases we still need a shim.
Backports commit e1d455dd91c935c714412dafeb24db947429a929 from qemu
2019-05-28 18:50:48 -04:00
Bastian Koppelmann
580457a1d2
target/riscv: Convert quadrant 2 of RVXC insns to decodetree
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Backports commit 97b0be81f6f20bfd53725cb2500b47c6786be532 from qemu
2019-03-19 04:53:07 -04:00
Bastian Koppelmann
b4854e3340
target/riscv: Convert quadrant 1 of RVXC insns to decodetree
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Backports commit 07b001c6fc500fa0e87fd8210f270d7dc8aff9ea from qemu
2019-03-19 04:50:08 -04:00
Lioncash
8d294a7897
target/riscv: Convert quadrant 0 of RVXC insns to decodetree
2019-03-19 04:45:53 -04:00