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unicorn/qemu/target/riscv/insn_trans
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Bastian Koppelmann 1024ceb4df
target/riscv: Convert RV64I load/store insns to decodetree 
this splits the 64-bit only instructions into its own decode file such
that we generate the decoder for these instructions only for the RISC-V
64 bit target.

Backports commit 7e45a682edc32ba90d6955215f062210531b835b from qemu
2019-03-18 16:02:16 -04:00
..
trans_rvi.inc.c target/riscv: Convert RV64I load/store insns to decodetree 2019-03-18 16:02:16 -04:00