unicorn/qemu/target/arm
Peter Maydell 108cff5e61
target/arm: Tighten up Thumb decode where new v8M insns will be
Tighten up the T32 decoder in the places where new v8M instructions
will be:
* TT/TTT/TTA/TTAT are in what was nominally LDREX/STREX r15, ...
which is UNPREDICTABLE:
make the UNPREDICTABLE behaviour be to UNDEF
* BXNS/BLXNS are distinguished from BX/BLX via the low 3 bits,
which in previous architectural versions are SBZ:
enforce the SBZ via UNDEF rather than ignoring it, and move
the "ARCH(5)" UNDEF case up so we don't leak a TCG temporary
* SG is in the encoding which would be LDRD/STRD with rn = r15;
this is UNPREDICTABLE and we currently UNDEF:
move this check further up the code so that we don't leak
TCG temporaries in the UNDEF case and have a better place
to put the SG decode.

This means that if a v8M binary is accidentally run on v7M
or if a test case hits something that we haven't implemented
yet the behaviour will be obvious (UNDEF) rather than obscure
(plough on treating it as a different instruction).

In the process, add some comments about the instruction patterns
at these points in the decode. Our Thumb and ARM decoders are
very difficult to understand currently, but gradually adding
comments like this should help to clarify what exactly has
been decoded when.

Backports commit ebfe27c593e5b222aa2a1fc545b447be3d995faa from qemu
2018-03-04 12:51:08 -05:00
..
arm-powerctl.c ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm-powerctl.h ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2018-03-02 00:20:11 -05:00
cpu-qom.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
cpu.c target/arm: Move PMSAv7 reset into arm_cpu_reset() so M profile MPUs get reset 2018-03-04 01:20:57 -05:00
cpu.h target/arm: Rename cp15.c6_rgnr to pmsav7.rnr 2018-03-04 01:18:53 -05:00
cpu64.c target-arm: Enable EL2 feature bit on A53 and A57 2018-03-01 23:36:44 -05:00
crypto_helper.c Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
helper-a64.c Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
helper-a64.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
helper.c target/arm: Consolidate PMSA handling in get_phys_addr() 2018-03-04 12:48:22 -05:00
helper.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
internals.h target/arm: Use MMUAccessType enum rather than int 2018-03-04 12:45:56 -05:00
iwmmxt_helper.c Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
kvm-consts.h arm: better stub version for MISMATCH_CHECK 2018-03-02 00:13:45 -05:00
Makefile.objs ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
neon_helper.c Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
op_addsub.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
op_helper.c target/arm: Don't trap WFI/WFE for M profile 2018-03-04 12:46:37 -05:00
psci.c target/arm/psci.c: If EL2 implemented, start CPUs in EL2 2018-03-01 23:34:57 -05:00
translate-a64.c target/arm: Require alignment for load exclusive 2018-03-04 01:53:04 -05:00
translate.c target/arm: Tighten up Thumb decode where new v8M insns will be 2018-03-04 12:51:08 -05:00
translate.h tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00
unicorn.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
unicorn_aarch64.c Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
unicorn_arm.c Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00