Dimitrije Nikolic 128bfa00d2 target/mips: Add CP0 Config3 and Config5 fields to DisasContext structure ... Add CP0_Config3 and CP0_Config5 to DisasContext structure. This is needed for implementing availability control of various instructions. Backports commit ab77fc611bf004dfd25ecad5b2c11261e32012e9 from qemu		2018-08-27 05:20:26 -04:00
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cp0_timer.c	mips: introduce internal.h and cleanup cpu.h	2018-03-05 00:25:56 -05:00
cpu-qom.h	mips: MIPSCPU model subclasses	2018-03-05 00:42:29 -05:00
cpu.c	cpu: Add Error argument to cpu_exec_init()	2018-03-21 07:50:33 -04:00
cpu.h	target/mips: Add CP0 BadInstrX register	2018-08-17 14:22:02 -04:00
dsp_helper.c	mips: Improve macro parenthesization	2018-03-05 00:51:51 -05:00
helper.c	target/mips: Don't update BadVAddr register in Debug Mode	2018-08-17 14:24:19 -04:00
helper.h	target/mips: Implement emulation of nanoMIPS ROTX instruction	2018-08-27 05:11:14 -04:00
internal.h	target/mips/internal: Perform comparison pass with qemu	2018-03-12 15:13:17 -04:00
lmi_helper.c	Move target-* CPU file into a target/ folder	2018-03-01 22:50:58 -05:00
Makefile.objs	mips: introduce internal.h and cleanup cpu.h	2018-03-05 00:25:56 -05:00
mips-defs.h	target/mips: Add preprocessor constants for nanoMIPS	2018-08-27 04:11:21 -04:00
msa_helper.c	target/mips: Remove floatX_maybe_silence_nan from conversions	2018-05-19 23:25:04 -04:00
op_helper.c	target/mips: Implement emulation of nanoMIPS ROTX instruction	2018-08-27 05:11:14 -04:00
TODO	Move target-* CPU file into a target/ folder	2018-03-01 22:50:58 -05:00
translate.c	target/mips: Add CP0 Config3 and Config5 fields to DisasContext structure	2018-08-27 05:20:26 -04:00
translate_init.c	target/mips/translate: Perform comparison pass with qemu	2018-03-12 17:52:56 -04:00
unicorn.c	Use DEFINE_MACHINE() to register all machines	2018-03-11 15:12:46 -04:00
unicorn.h	Move target-* CPU file into a target/ folder	2018-03-01 22:50:58 -05:00