unicorn/qemu
Emilio G. Cota 1677898a09
cputlb: read CPUTLBEntry.addr_write atomically
Updates can come from other threads, so readers that do not
take tlb_lock must use atomic_read to avoid undefined
behaviour (UB).

This completes the conversion to tlb_lock. This conversion results
on average in no performance loss, as the following experiments
(run on an Intel i7-6700K CPU @ 4.00GHz) show.

1. aarch64 bootup+shutdown test:

- Before:
Performance counter stats for 'taskset -c 0 ../img/aarch64/die.sh' (10 runs):

7487.087786 task-clock (msec) # 0.998 CPUs utilized ( +- 0.12% )
31,574,905,303 cycles # 4.217 GHz ( +- 0.12% )
57,097,908,812 instructions # 1.81 insns per cycle ( +- 0.08% )
10,255,415,367 branches # 1369.747 M/sec ( +- 0.08% )
173,278,962 branch-misses # 1.69% of all branches ( +- 0.18% )

7.504481349 seconds time elapsed ( +- 0.14% )

- After:
Performance counter stats for 'taskset -c 0 ../img/aarch64/die.sh' (10 runs):

7462.441328 task-clock (msec) # 0.998 CPUs utilized ( +- 0.07% )
31,478,476,520 cycles # 4.218 GHz ( +- 0.07% )
57,017,330,084 instructions # 1.81 insns per cycle ( +- 0.05% )
10,251,929,667 branches # 1373.804 M/sec ( +- 0.05% )
173,023,787 branch-misses # 1.69% of all branches ( +- 0.11% )

7.474970463 seconds time elapsed ( +- 0.07% )

2. SPEC06int:
SPEC06int (test set)
[Y axis: Speedup over master]
1.15 +-+----+------+------+------+------+------+-------+------+------+------+------+------+------+----+-+
| |
1.1 +-+.................................+++.............................+ tlb-lock-v2 (m+++x) +-+
| +++ | +++ tlb-lock-v3 (spinl|ck) |
| +++ | | +++ +++ | | |
1.05 +-+....+++...........####.........|####.+++.|......|.....###....+++...........+++....###.........+-+
| ### ++#| # |# |# ***### +++### +++#+# | +++ | #|# ### |
1 +-+++***+#++++####+++#++#++++++++++#++#+*+*++#++++#+#+****+#++++###++++###++++###++++#+#++++#+#+++-+
| *+* # #++# *** # #### *** # * *++# ****+# *| * # ****|# |# # #|# #+# # # |
0.95 +-+..*.*.#....#..#.*|*..#...#..#.*|*..#.*.*..#.*|.*.#.*++*.#.*++*+#.****.#....#+#....#.#..++#.#..+-+
| * * # # # *|* # # # *|* # * * # *++* # * * # * * # * |* # ++# # # # *** # |
| * * # ++# # *+* # # # *|* # * * # * * # * * # * * # *++* # **** # ++# # * * # |
0.9 +-+..*.*.#...|#..#.*.*..#.++#..#.*|*..#.*.*..#.*..*.#.*..*.#.*..*.#.*..*.#.*.|*.#...|#.#..*.*.#..+-+
| * * # *** # * * # |# # *+* # * * # * * # * * # * * # * * # *++* # |# # * * # |
0.85 +-+..*.*.#..*|*..#.*.*..#.***..#.*.*..#.*.*..#.*..*.#.*..*.#.*..*.#.*..*.#.*..*.#.****.#..*.*.#..+-+
| * * # *+* # * * # *|* # * * # * * # * * # * * # * * # * * # * * # * |* # * * # |
| * * # * * # * * # *+* # * * # * * # * * # * * # * * # * * # * * # * |* # * * # |
0.8 +-+..*.*.#..*.*..#.*.*..#.*.*..#.*.*..#.*.*..#.*..*.#.*..*.#.*..*.#.*..*.#.*..*.#.*++*.#..*.*.#..+-+
| * * # * * # * * # * * # * * # * * # * * # * * # * * # * * # * * # * * # * * # |
0.75 +-+--***##--***###-***###-***###-***###-***###-****##-****##-****##-****##-****##-****##--***##--+-+
400.perlben401.bzip2403.gcc429.m445.gob456.hmme45462.libqua464.h26471.omnet473483.xalancbmkgeomean

png: https://imgur.com/a/BHzpPTW

Notes:
- tlb-lock-v2 corresponds to an implementation with a mutex.
- tlb-lock-v3 corresponds to the current implementation, i.e.
a spinlock and a single lock acquisition in tlb_set_page_with_attrs.

Backports commit 403f290c0603f35f2d09c982bf5549b6d0803ec1 from qemu
2018-10-23 15:37:43 -04:00
..
accel cputlb: read CPUTLBEntry.addr_write atomically 2018-10-23 15:37:43 -04:00
crypto crypto: Clean up includes 2018-02-19 00:47:40 -05:00
default-configs arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
docs docs/devel/memory.txt: Document _with_attrs accessors 2018-10-04 04:46:26 -04:00
fpu softfloat: Specialize udiv_qrnnd for ppc64 2018-10-08 14:15:15 -04:00
hw hw/mips/mips_r4k: Fix initialization of MIPS target CPUs 2018-09-03 17:40:08 -04:00
include cputlb: read CPUTLBEntry.addr_write atomically 2018-10-23 15:37:43 -04:00
qapi qobject: Modify qobject_ref() to return obj 2018-05-04 10:24:10 -04:00
qobject qstring: Move qstring_from_substr()'s @end one to the right 2018-08-02 21:24:19 -04:00
qom tcg: access cpu->icount_decr.u16.high with atomics 2018-10-23 14:36:46 -04:00
scripts qapi: Emit a blank line before dummy declaration 2018-09-25 21:12:16 -04:00
target target/arm: Check HAVE_CMPXCHG128 at translate time 2018-10-23 15:29:46 -04:00
tcg tcg: Split CONFIG_ATOMIC128 2018-10-23 15:17:39 -04:00
util Haiku support patches (#989) 2018-09-03 07:55:51 -04:00
aarch64.h exec: introduce tlb_init 2018-10-23 14:41:29 -04:00
aarch64eb.h exec: introduce tlb_init 2018-10-23 14:41:29 -04:00
accel.c clean-up: removed duplicate #includes 2018-02-28 08:51:56 -05:00
arm.h exec: introduce tlb_init 2018-10-23 14:41:29 -04:00
armeb.h exec: introduce tlb_init 2018-10-23 14:41:29 -04:00
CODING_STYLE import 2015-08-21 15:04:50 +08:00
configure tcg: Split CONFIG_ATOMIC128 2018-10-23 15:17:39 -04:00
COPYING import 2015-08-21 15:04:50 +08:00
COPYING.LIB import 2015-08-21 15:04:50 +08:00
cpus.c Include qapi/error.h exactly where needed 2018-03-07 12:26:38 -05:00
exec.c exec: introduce tlb_init 2018-10-23 14:41:29 -04:00
gen_all_header.sh arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
glib_compat.c Use cpu_create(type) instead of cpu_init(cpu_model) 2018-03-20 14:20:30 -04:00
HACKING HACKING: document preference for g_new instead of g_malloc 2018-05-22 00:30:50 -04:00
header_gen.py exec: introduce tlb_init 2018-10-23 14:41:29 -04:00
ioport.c hw: remove pio_addr_t 2018-02-24 02:43:16 -05:00
LICENSE import 2015-08-21 15:04:50 +08:00
m68k.h exec: introduce tlb_init 2018-10-23 14:41:29 -04:00
Makefile Revert "Makefile: Rename TARGET_DIRS to TARGET_LIST" 2018-07-05 17:40:24 -04:00
Makefile.objs qapi: Move qapi-schema.json to qapi/, rename generated files 2018-03-09 11:35:11 -05:00
Makefile.target tcg: remove softfloat from --disable-tcg builds 2018-06-07 11:49:35 -04:00
memory.c memory: Remove old_mmio accessors 2018-10-04 04:45:30 -04:00
memory_ldst.inc.c exec: Fix MAP_RAM for cached access 2018-07-03 01:11:12 -04:00
memory_mapping.c include/qemu/osdep.h: Don't include qapi/error.h 2018-02-21 23:08:18 -05:00
mips.h exec: introduce tlb_init 2018-10-23 14:41:29 -04:00
mips64.h exec: introduce tlb_init 2018-10-23 14:41:29 -04:00
mips64el.h exec: introduce tlb_init 2018-10-23 14:41:29 -04:00
mipsel.h exec: introduce tlb_init 2018-10-23 14:41:29 -04:00
powerpc.h exec: introduce tlb_init 2018-10-23 14:41:29 -04:00
qemu-timer.c timer/cpus: fix some typos and update some comments 2018-02-25 23:21:57 -05:00
riscv32.h target/arm: Add v8M stack checks on ADD/SUB/MOV of SP 2018-10-08 14:15:15 -04:00
riscv64.h target/arm: Add v8M stack checks on ADD/SUB/MOV of SP 2018-10-08 14:15:15 -04:00
rules.mak build-sys: silence make by default or V=0 2018-03-06 08:58:03 -05:00
sparc.h exec: introduce tlb_init 2018-10-23 14:41:29 -04:00
sparc64.h exec: introduce tlb_init 2018-10-23 14:41:29 -04:00
unicorn_common.h unicorn_common: Fix unicorn memory functions failing 2018-09-03 10:40:14 -04:00
VERSION Open 3.1 development tree 2018-08-16 06:33:25 -04:00
vl.c Use cpu_create(type) instead of cpu_init(cpu_model) 2018-03-20 14:20:30 -04:00
vl.h import 2015-08-21 15:04:50 +08:00
x86_64.h exec: introduce tlb_init 2018-10-23 14:41:29 -04:00