unicorn/qemu
Luc Michel 1ae9d988c6
target/arm: fix smc incorrectly trapping to EL3 when secure is off
This commit fixes a case where the CPU would try to go to EL3 when
executing an smc instruction, even though ARM_FEATURE_EL3 is false. This
case is raised when the PSCI conduit is set to smc, but the smc
instruction does not lead to a valid PSCI call.

QEMU crashes with an assertion failure latter on because of incoherent
mmu_idx.

This commit refactors the pre_smc helper by enumerating all the possible
way of handling an scm instruction, and covering the previously missing
case leading to the crash.

The following minimal test would crash before this commit:

.global _start
.text
_start:
ldr x0, =0xdeadbeef ; invalid PSCI call
smc #0

run with the following command line:

aarch64-linux-gnu-gcc -nostdinc -nostdlib -Wl,-Ttext=40000000 \
-o test test.s

qemu-system-aarch64 -M virt,virtualization=on,secure=off \
-cpu cortex-a57 -kernel test

Backports commit 7760da729ac88f112f98f36395ac3b55fc9e4211 from qemu
2018-11-23 18:57:23 -05:00
..
accel tcg: Support MMU protection regions smaller than TARGET_PAGE_SIZE 2018-11-16 21:35:54 -05:00
crypto
default-configs
docs
fpu softfloat: Don't execute divdeu without power7 2018-11-11 08:33:46 -05:00
hw
include tcg: Support MMU protection regions smaller than TARGET_PAGE_SIZE 2018-11-16 21:35:54 -05:00
qapi
qobject
qom
scripts decodetree: Allow multiple input files 2018-11-11 08:28:55 -05:00
target target/arm: fix smc incorrectly trapping to EL3 when secure is off 2018-11-23 18:57:23 -05:00
tcg tcg/tcg-op.h: Add multiple include guard 2018-11-11 08:51:51 -05:00
util
aarch64.h target/arm: Correctly implement handling of HCR_EL2.{VI, VF} 2018-11-16 21:53:53 -05:00
aarch64eb.h target/arm: Correctly implement handling of HCR_EL2.{VI, VF} 2018-11-16 21:53:53 -05:00
accel.c
arm.h target/arm: Correctly implement handling of HCR_EL2.{VI, VF} 2018-11-16 21:53:53 -05:00
armeb.h target/arm: Correctly implement handling of HCR_EL2.{VI, VF} 2018-11-16 21:53:53 -05:00
CODING_STYLE
configure tcg: Split CONFIG_ATOMIC128 2018-10-23 15:17:39 -04:00
COPYING
COPYING.LIB
cpus.c
exec.c Partial backport of: exec.c: Handle IOMMUs in address_space_translate_for_iotlb() 2018-11-16 21:24:55 -05:00
gen_all_header.sh
glib_compat.c
HACKING
header_gen.py target/arm: Correctly implement handling of HCR_EL2.{VI, VF} 2018-11-16 21:53:53 -05:00
ioport.c
LICENSE
m68k.h target/arm: Correctly implement handling of HCR_EL2.{VI, VF} 2018-11-16 21:53:53 -05:00
Makefile
Makefile.objs
Makefile.target
memory.c memory: learn about non-volatile memory region 2018-11-11 08:50:39 -05:00
memory_ldst.inc.c
memory_mapping.c
mips.h target/arm: Correctly implement handling of HCR_EL2.{VI, VF} 2018-11-16 21:53:53 -05:00
mips64.h target/arm: Correctly implement handling of HCR_EL2.{VI, VF} 2018-11-16 21:53:53 -05:00
mips64el.h target/arm: Correctly implement handling of HCR_EL2.{VI, VF} 2018-11-16 21:53:53 -05:00
mipsel.h target/arm: Correctly implement handling of HCR_EL2.{VI, VF} 2018-11-16 21:53:53 -05:00
powerpc.h target/arm: Correctly implement handling of HCR_EL2.{VI, VF} 2018-11-16 21:53:53 -05:00
qemu-timer.c
riscv32.h
riscv64.h
rules.mak
sparc.h target/arm: Correctly implement handling of HCR_EL2.{VI, VF} 2018-11-16 21:53:53 -05:00
sparc64.h target/arm: Correctly implement handling of HCR_EL2.{VI, VF} 2018-11-16 21:53:53 -05:00
unicorn_common.h
VERSION Update version for v3.1.0-rc1 release 2018-11-16 22:00:34 -05:00
vl.c
vl.h
x86_64.h target/arm: Correctly implement handling of HCR_EL2.{VI, VF} 2018-11-16 21:53:53 -05:00