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unicorn/qemu/target/arm
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Peter Maydell 2c6e54d1cd target/arm: Implement M-profile FPSCR_nzcvqc 
v8.1M defines a new FP system register FPSCR_nzcvqc; this behaves
like the existing FPSCR, except that it reads and writes only bits
[31:27] of the FPSCR (the N, Z, C, V and QC flag bits). (Unlike the
FPSCR, the special case for Rt=15 of writing the CPSR.NZCV is not
permitted.)

Implement the register. Since we don't yet implement MVE, we handle
the QC bit as RES0, with todo comments for where we will need to add
support later.

Backports 9542c30bcf13c495400d63616dd8dfa825b04685
2021-03-03 18:45:38 -05:00
..
a32-uncond.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
a32.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
arm-powerctl.c arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on() 2020-01-07 18:10:29 -05:00
arm-powerctl.h ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm_ldst.h arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
cpu-param.h target/arm: Don't use a TLB for ARMMMUIdx_Stage2 2020-05-07 08:40:06 -04:00
cpu-qom.h arm: Fix typo in AARCH64_CPU_GET_CLASS definition 2021-03-01 18:03:29 -05:00
cpu.c target/arm: Don't clobber ID_PFR1.Security on M-profile cores 2021-03-03 17:52:30 -05:00
cpu.h target/arm: Implement M-profile FPSCR_nzcvqc 2021-03-03 18:45:38 -05:00
cpu64.c target/arm: Make '-cpu max' have a 48-bit PA 2021-03-01 19:50:28 -05:00
crypto_helper.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
debug_helper.c target/arm: Stop assuming DBGDIDR always exists 2020-03-21 18:26:24 -04:00
helper-a64.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
helper-a64.h arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
helper-sve.h arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
helper.c target/arm: Implement v8.1M PXN extension 2021-03-03 17:50:26 -05:00
helper.h target/arm: Fix neon VTBL/VTBX for len > 1 2021-03-02 13:23:13 -05:00
internals.h target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11 2021-03-01 20:12:36 -05:00
iwmmxt_helper.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
kvm-consts.h arm: better stub version for MISMATCH_CHECK 2018-03-02 00:13:45 -05:00
m-nocp.decode target/arm: Implement VSCCLRM insn 2021-03-03 17:57:30 -05:00
m_helper.c target/arm: Get correct MMU index for other-security-state 2021-03-02 13:08:44 -05:00
Makefile.objs target/arm: Do M-profile NOCP checks early and via decodetree 2021-02-26 11:17:23 -05:00
mte_helper.c target/arm: Fix reported EL for mte_check_fail 2021-03-01 20:10:44 -05:00
neon-dp.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
neon-ls.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
neon-shared.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
neon_helper.c target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree 2020-05-15 23:26:51 -04:00
op_addsub.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
op_helper.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
pauth_helper.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
psci.c fix WFI/WFE length in syndrome register 2018-03-05 11:21:51 -05:00
sve.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
sve_helper.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
t16.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
t32.decode target/arm: Implement CLRM instruction 2021-03-03 18:00:28 -05:00
tlb_helper.c target/arm: Cache the Tagged bit for a page in MemTxAttrs 2021-02-25 22:48:04 -05:00
translate-a64.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
translate-a64.h arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
translate-neon.inc.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
translate-sve.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
translate-vfp.inc.c target/arm: Implement M-profile FPSCR_nzcvqc 2021-03-03 18:45:38 -05:00
translate.c target/arm: Move general-use constant expanders up in translate.c 2021-03-03 18:29:32 -05:00
translate.h target/arm: Rearrange {sve,fp}_check_access assert 2021-02-26 13:56:27 -05:00
unicorn.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
unicorn_aarch64.c unicorn_aarch64: Use aa64_vfp_qreg instead of aa32_vfp_dreg 2018-09-03 07:47:40 +01:00
unicorn_arm.c arm/translate: Do not tracecode when in an IT block 2021-02-07 19:14:32 +00:00
vec_helper.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
vec_internal.h arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
vfp-uncond.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
vfp.decode target/arm: Implement VLDR/VSTR system register 2021-03-03 18:42:05 -05:00
vfp_helper.c target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension 2021-03-01 20:36:02 -05:00