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unicorn/qemu
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Peter Maydell 33d42df60c
translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD 
For AArch32 LDREXD and STREXD, architecturally the 32-bit word at the
lowest address is always Rt and the one at addr+4 is Rt2, even if the
CPU is big-endian. Our implementation does these with a single
64-bit store, so if we're big-endian then we need to put the two
32-bit halves together in the opposite order to little-endian,
so that they end up in the right places. We were trying to do
this with the gen_aa32_frob64() function, but that is not correct
for the usermode emulator, because there there is a distinction
between "load a 64 bit value" (which does a BE 64-bit access
and doesn't need swapping) and "load two 32 bit values as one
64 bit access" (where we still need to do the swapping, like
system mode BE32).

Backports commit 3448d47b3172015006b79197eb5a69826c6a7b6d from qemu
2018-03-05 11:39:29 -05:00
..
accel tcg: Merge opcode arguments into TCGOp 2018-03-05 04:45:20 -05:00
crypto crypto: Clean up includes 2018-02-19 00:47:40 -05:00
default-configs arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
docs docs: clarify memory region lifecycle 2018-02-12 15:11:21 -05:00
fpu softfloat: define floatx80_round() 2018-03-03 20:57:27 -05:00
hw mips: replace cpu_mips_init() with cpu_generic_init() 2018-03-05 00:49:10 -05:00
include qom: Introduce CPUClass.tcg_initialize 2018-03-05 09:49:26 -05:00
qapi qapi: add explicit null to string input and output visitors 2018-03-03 20:32:50 -05:00
qobject qnum: add uint type 2018-03-03 18:37:56 -05:00
qom qom: introduce type_register_static_array() 2018-03-05 03:49:50 -05:00
scripts scripts: use build_ prefix for string not piped through cgen() 2018-03-03 22:11:28 -05:00
target translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD 2018-03-05 11:39:29 -05:00
tcg tcg/s390x: Use constant pool for prologue 2018-03-05 11:28:39 -05:00
util bitmap: provide to_le/from_le helpers 2018-03-05 01:11:13 -05:00
aarch64.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
aarch64eb.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
accel.c clean-up: removed duplicate #includes 2018-02-28 08:51:56 -05:00
arm.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
armeb.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
atomic_template.h tcg: Add atomic128 helpers 2018-02-27 21:43:48 -05:00
CODING_STYLE import 2015-08-21 15:04:50 +08:00
configure build: disable -Wmissing-braces on older compilers 2018-03-05 11:29:54 -05:00
COPYING import 2015-08-21 15:04:50 +08:00
COPYING.LIB import 2015-08-21 15:04:50 +08:00
cpu-exec-common.c tcg: Add EXCP_ATOMIC 2018-02-27 11:57:58 -05:00
cpu-exec.c exec-all: extract tb->tc_* into a separate struct tc_tb 2018-03-05 02:57:22 -05:00
cpus.c tcg: handle EXCP_ATOMIC exception for system emulation 2018-03-02 09:56:43 -05:00
cputlb.c cputlb: Support generating CPU exceptions on memory transaction failures 2018-03-04 13:14:50 -05:00
exec.c qom: Introduce CPUClass.tcg_initialize 2018-03-05 09:49:26 -05:00
gen_all_header.sh arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
glib_compat.c qapi: Improve qobject input visitor error reporting 2018-03-02 12:05:53 -05:00
HACKING import 2015-08-21 15:04:50 +08:00
header_gen.py qom: Introduce CPUClass.tcg_initialize 2018-03-05 09:49:26 -05:00
ioport.c hw: remove pio_addr_t 2018-02-24 02:43:16 -05:00
LICENSE import 2015-08-21 15:04:50 +08:00
m68k.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
Makefile Makefile: Add a FORCE target 2018-02-24 17:03:51 -05:00
Makefile.objs tcg: Add atomic helpers 2018-02-27 15:57:47 -05:00
Makefile.target tcg: Add generic translation framework 2018-03-04 14:31:16 -05:00
memory.c memory: avoid a name clash with access macro 2018-03-05 01:13:01 -05:00
memory_ldst.inc.c exec: introduce memory_ldst.inc.c 2018-03-01 09:59:34 -05:00
memory_mapping.c include/qemu/osdep.h: Don't include qapi/error.h 2018-02-21 23:08:18 -05:00
mips.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
mips64.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
mips64el.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
mipsel.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
powerpc.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
qapi-schema.json qapi: Update scripts to commit 01b2ffcedd94ad7b42bc870e4c6936c87ad03429 2018-03-03 18:32:12 -05:00
qemu-timer.c timer/cpus: fix some typos and update some comments 2018-02-25 23:21:57 -05:00
rules.mak rules.mak: Don't extract libs from .mo-libs in link command 2018-02-26 02:08:03 -05:00
softmmu_template.h cputlb: Support generating CPU exceptions on memory transaction failures 2018-03-04 13:14:50 -05:00
sparc.h qom: Introduce CPUClass.tcg_initialize 2018-03-05 09:49:26 -05:00
sparc64.h qom: Introduce CPUClass.tcg_initialize 2018-03-05 09:49:26 -05:00
tcg-runtime.c exec-all: extract tb->tc_* into a separate struct tc_tb 2018-03-05 02:57:22 -05:00
translate-all.c tcg: Merge opcode arguments into TCGOp 2018-03-05 04:45:20 -05:00
translate-all.h translate-all.c: Compute L1 page table properties at runtime 2018-02-26 11:46:58 -05:00
translate-common.c exec: Clean up includes 2018-02-19 00:49:55 -05:00
unicorn_common.h qom/cpu: Add MemoryRegion property 2018-02-18 21:54:50 -05:00
VERSION import 2015-08-21 15:04:50 +08:00
vl.c util: add cacheinfo 2018-03-03 16:58:28 -05:00
vl.h import 2015-08-21 15:04:50 +08:00
x86_64.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00