Mateja Marjanovic 3ee6295d7f target/mips: Fix MSA instructions LD.<B|H|W|D> on big endian host ... Fix the case when the host is a big endian machine, and change the approach toward LD.<B|H|W|D> instruction helpers. Backports commit 83be6b54123a8f3c529554139f1d1e43356edf8d from qemu		2019-05-28 19:27:05 -04:00
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arm	target/arm: Fix vector operation segfault	2019-05-24 18:02:32 -04:00
i386	target/i386: Implement CPUID_EXT_RDRAND	2019-05-23 15:12:50 -04:00
m68k	target/m68k: Optimize rotate_x() using extract_i32()	2019-05-17 12:07:07 -04:00
mips	target/mips: Fix MSA instructions LD.<B|H|W|D> on big endian host	2019-05-28 19:27:05 -04:00
riscv	target/riscv: Only flush TLB if SATP.ASID changes	2019-05-28 19:22:51 -04:00
sparc	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-16 17:35:37 -04:00