unicorn/qemu/target/arm
Peter Maydell 43d8441881 target/arm: Implement VSCCLRM insn
Implement the v8.1M VSCCLRM insn, which zeros floating point
registers if there is an active floating point context.
This requires support in write_neon_element32() for the MO_32
element size, so add it.

Because we want to use arm_gen_condlabel(), we need to move
the definition of that function up in translate.c so it is
before the #include of translate-vfp.c.inc.

Backports 83ff3d6add965c9752324de11eac5687121ea826
2021-03-03 17:57:30 -05:00
..
a32-uncond.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
a32.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
arm-powerctl.c
arm-powerctl.h
arm_ldst.h arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
cpu-param.h
cpu-qom.h arm: Fix typo in AARCH64_CPU_GET_CLASS definition 2021-03-01 18:03:29 -05:00
cpu.c target/arm: Don't clobber ID_PFR1.Security on M-profile cores 2021-03-03 17:52:30 -05:00
cpu.h target/arm: Implement VSCCLRM insn 2021-03-03 17:57:30 -05:00
cpu64.c target/arm: Make '-cpu max' have a 48-bit PA 2021-03-01 19:50:28 -05:00
crypto_helper.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
debug_helper.c
helper-a64.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
helper-a64.h arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
helper-sve.h arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
helper.c target/arm: Implement v8.1M PXN extension 2021-03-03 17:50:26 -05:00
helper.h target/arm: Fix neon VTBL/VTBX for len > 1 2021-03-02 13:23:13 -05:00
internals.h target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11 2021-03-01 20:12:36 -05:00
iwmmxt_helper.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
kvm-consts.h arm: better stub version for MISMATCH_CHECK 2018-03-02 00:13:45 -05:00
m-nocp.decode target/arm: Implement VSCCLRM insn 2021-03-03 17:57:30 -05:00
m_helper.c target/arm: Get correct MMU index for other-security-state 2021-03-02 13:08:44 -05:00
Makefile.objs
mte_helper.c target/arm: Fix reported EL for mte_check_fail 2021-03-01 20:10:44 -05:00
neon-dp.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
neon-ls.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
neon-shared.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
neon_helper.c
op_addsub.h
op_helper.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
pauth_helper.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
psci.c
sve.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
sve_helper.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
t16.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
t32.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
tlb_helper.c
translate-a64.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
translate-a64.h arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
translate-neon.inc.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
translate-sve.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
translate-vfp.inc.c target/arm: Implement VSCCLRM insn 2021-03-03 17:57:30 -05:00
translate.c target/arm: Implement VSCCLRM insn 2021-03-03 17:57:30 -05:00
translate.h target/arm: Rearrange {sve,fp}_check_access assert 2021-02-26 13:56:27 -05:00
unicorn.h
unicorn_aarch64.c
unicorn_arm.c
vec_helper.c arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
vec_internal.h arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
vfp-uncond.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
vfp.decode arm tcg cpus: Fix Lesser GPL version number 2021-03-02 13:30:35 -05:00
vfp_helper.c target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension 2021-03-01 20:36:02 -05:00