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2a4a7b9391
Most of the existing users would continue around a loop which would fault the tlb entry in via a normal load/store. But for AArch64 SVE we have an existing emulation bug wherein we would mark the first element of a no-fault vector load as faulted (within the FFR, not via exception) just because we did not have its address in the TLB. Now we can properly only mark it as faulted if there really is no valid, readable translation, while still not raising an exception. (Note that beyond the first element of the vector, the hardware may report a fault for any reason whatsoever; with at least one element loaded, forward progress is guaranteed.) Backports commit 4811e9095c0491bc6f5450e5012c9c4796b9e59d from qemu |
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| crypto | ||
| exec | ||
| fpu | ||
| hw | ||
| qapi | ||
| qemu | ||
| qom | ||
| sysemu | ||
| config.h | ||
| elf.h | ||
| glib_compat.h | ||
| qemu-common.h | ||