unicorn/qemu/target/i386
Peter Maydell 1a3abaa81a target/i386: Check privilege level for protected mode 'int N' task gate
When the 'int N' instruction is executed in protected mode, the
pseudocode in the architecture manual specifies that we need to check:

* vector number within IDT limits
* selected IDT descriptor is a valid type (interrupt, trap or task gate)
* if this was a software interrupt then gate DPL < CPL

The way we had structured the code meant that the privilege check for
software interrupts ended up not in the code path taken for task gate
handling, because all of the task gate handling code was in the 'case 5'
of the switch which was checking "is this descriptor a valid type".

Move the task gate handling code out of that switch (so that it is now
purely doing the "valid type?" check) and below the software interrupt
privilege check.

The effect of this missing check was that in a guest userspace binary
executing 'int 8' would cause a guest kernel panic rather than the
userspace binary being handed a SEGV.

This is essentially the same bug fixed in VirtualBox in 2012:
https://www.halfdog.net/Security/2012/VirtualBoxSoftwareInterrupt0x8GuestCrash/

Note that for QEMU this is not a security issue because it is only
present when using TCG.

Backports 3df1a3d070575419859cbbab1083fafa7ec2669a
2021-03-03 19:32:10 -05:00
..
arch_memory_mapping.c target/i386: enable A20 automatically in system management mode 2018-03-03 14:33:09 -05:00
bpt_helper.c x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
cc_helper.c x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
cc_helper_template.h x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 19:35:46 -04:00
cpu-qom.h i386: Register versioned CPU models 2019-08-08 19:01:35 -04:00
cpu.c x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
cpu.h x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
excp_helper.c x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
fpu_helper.c x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
helper.c x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
helper.h target/i386: fix IEEE SSE floating-point exception raising 2021-02-25 23:21:32 -05:00
int_helper.c x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
Makefile.objs target/i386: add the CONFIG_TCG into Makefiles 2018-03-03 21:57:22 -05:00
mem_helper.c x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
misc_helper.c x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
mpx_helper.c x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
ops_sse.h x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
ops_sse_header.h x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
seg_helper.c target/i386: Check privilege level for protected mode 'int N' task gate 2021-03-03 19:32:10 -05:00
shift_helper_template.h x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
smm_helper.c x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
svm.h target-i386: Add NPT support 2018-07-03 19:52:56 -04:00
svm_helper.c x86 tcg cpus: Fix Lesser GPL version number 2021-03-02 13:33:10 -05:00
topology.h i386: Update new x86_apicid parsing rules with die_offset support 2019-08-08 18:22:03 -04:00
translate.c target/i386: fix operand order for PDEP and PEXT 2021-03-03 19:09:21 -05:00
unicorn.c check arguments, return error instead of raising exceptions. (#1125) 2020-01-14 09:00:11 -05:00
unicorn.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00