Richard Henderson 4ccadaf6cf tcg: Use memset for large vector byte replication ... In f47db80cc07, we handled odd-sized tail clearing for the case of hosts that have vector operations, but did not handle the case of hosts that do not have vector ops. This was ok until e2e7168a214b, which changed the encoding of simd_desc such that the odd sizes are impossible. Add memset as a tcg helper, and use that for all out-of-line byte stores to vectors. This includes, but is not limited to, the tail clearing operation in question. Backports 6d3ef04893bdea3e7aa08be3cce5141902836a31		2021-03-03 19:28:15 -05:00
..
address-spaces.h
cpu-all.h	accel/tcg: allow to invalidate a write TLB entry immediately	2020-01-14 07:14:10 -05:00
cpu-common.h
cpu-defs.h
cpu_ldst.h	target/arm: Use cpu_*_data_ra for sve_ldst_tlb_fn	2021-02-25 20:16:38 -05:00
cpu_ldst_template.h
cpu_ldst_useronly_template.h
cputlb.h
exec-all.h	target/arm: Add sve infrastructure for page lookup	2021-02-25 20:28:23 -05:00
gen-icount.h
helper-gen.h	tcg: Add support for a helper with 7 arguments	2020-03-21 16:53:56 -04:00
helper-head.h	tcg: Add support for a helper with 7 arguments	2020-03-21 16:53:56 -04:00
helper-proto.h	tcg: Use memset for large vector byte replication	2021-03-03 19:28:15 -05:00
helper-tcg.h	tcg: Add support for a helper with 7 arguments	2020-03-21 16:53:56 -04:00
hwaddr.h
ioport.h
memattrs.h	cputlb: Byte swap memory transaction attribute	2020-01-07 19:15:33 -05:00
memop.h	cputlb: Replace size and endian operands for MemOp	2020-01-07 19:03:51 -05:00
memory-internal.h
memory.h	memory: Do not allow direct write access to rom_device regions	2020-04-30 07:26:06 -04:00
ram_addr.h	Memory: Enable writeback for given memory region	2020-01-14 07:44:24 -05:00
ramlist.h
semihost.h
tb-context.h
tb-hash.h
tb-lookup.h
translator.h