Craig Janeczek 8429d98b40 target/mips: Define a bit for MXU in insn_flags ... Define a bit for MXU in insn_flags. This is the first non-MIPS (third party) ASE supported in QEMU for MIPS, so it is placed in the section "bits 56-63: vendor-specific ASEs". Backports commit a031ac61619294ae473a78d1834e757fad8b59e5 from qemu		2018-11-11 05:52:18 -05:00
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arm	target/arm: Only flush tlb if ASID changes	2018-11-10 11:26:24 -05:00
i386	target/i386: Convert to HAVE_CMPXCHG128	2018-10-23 15:21:03 -04:00
m68k	Removes accessible assert	2018-10-06 05:02:20 -04:00
mips	target/mips: Define a bit for MXU in insn_flags	2018-11-11 05:52:18 -05:00
sparc	Sparc increase ttl number	2018-10-06 04:55:52 -04:00