Craig Janeczek 8429d98b40 target/mips: Define a bit for MXU in insn_flags ... Define a bit for MXU in insn_flags. This is the first non-MIPS (third party) ASE supported in QEMU for MIPS, so it is placed in the section "bits 56-63: vendor-specific ASEs". Backports commit a031ac61619294ae473a78d1834e757fad8b59e5 from qemu		2018-11-11 05:52:18 -05:00
..
cp0_timer.c	mips: introduce internal.h and cleanup cpu.h	2018-03-05 00:25:56 -05:00
cpu-qom.h	mips: MIPSCPU model subclasses	2018-03-05 00:42:29 -05:00
cpu.c	target/mips/cpu: Use type_register instead of type_register_static() in mips_cpu_register_types()	2018-09-03 17:36:23 -04:00
cpu.h	target/mips: Introduce MXU registers	2018-11-11 05:50:52 -05:00
dsp_helper.c	mips: Improve macro parenthesization	2018-03-05 00:51:51 -05:00
helper.c	target/mips: Implement hardware page table walker for MIPS32	2018-10-23 14:29:27 -04:00
helper.h	target/mips: Add CP0 PWCtl register	2018-10-23 14:23:04 -04:00
internal.h	target/mips: Implement hardware page table walker for MIPS32	2018-10-23 14:29:27 -04:00
lmi_helper.c	Move target-* CPU file into a target/ folder	2018-03-01 22:50:58 -05:00
Makefile.objs	mips: introduce internal.h and cleanup cpu.h	2018-03-05 00:25:56 -05:00
mips-defs.h	target/mips: Define a bit for MXU in insn_flags	2018-11-11 05:52:18 -05:00
msa_helper.c	target/mips: Remove floatX_maybe_silence_nan from conversions	2018-05-19 23:25:04 -04:00
op_helper.c	target/mips: Implement hardware page table walker for MIPS32	2018-10-23 14:29:27 -04:00
TODO	Move target-* CPU file into a target/ folder	2018-03-01 22:50:58 -05:00
translate.c	target/mips: Introduce MXU registers	2018-11-11 05:50:52 -05:00
translate_init.c	target/mips: Define the R5900 CPU	2018-11-10 12:11:11 -05:00
unicorn.c	Use DEFINE_MACHINE() to register all machines	2018-03-11 15:12:46 -04:00
unicorn.h	Move target-* CPU file into a target/ folder	2018-03-01 22:50:58 -05:00