Laurent Vivier b3c3cf84a5 target-m68k: fix bit operation with immediate value ... M680x0 bit operations with an immediate value use 9 bits of the 16bit value, while coldfire ones use only 8 bits. Backports commit fe53c2be8c12da345bd788b949e0b2360e4b3db3 from qemu		2018-03-01 19:12:20 -05:00
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cpu-qom.h	target-m68k: make cpu-qom.h not target specific	2018-02-24 00:56:58 -05:00
cpu.c	target-m68k: Reorg flags handling	2018-02-27 09:30:32 -05:00
cpu.h	target-m68k: Implement bitfield ops for memory	2018-03-01 19:07:06 -05:00
helper.c	target-m68k: Inline shifts	2018-03-01 12:11:10 -05:00
helper.h	target-m68k: Implement bfffo	2018-03-01 19:10:59 -05:00
Makefile.objs	del qemu/target-m68k/m68k-semi.c	2017-01-20 11:52:31 +08:00
op_helper.c	target-m68k: Implement bfffo	2018-03-01 19:10:59 -05:00
qregs.def	target-m68k: add 680x0 divu/divs variants	2018-03-01 11:38:53 -05:00
translate.c	target-m68k: fix bit operation with immediate value	2018-03-01 19:12:20 -05:00
unicorn.c	qemu-common: push cpu.h inclusion out of qemu-common.h	2018-02-24 01:50:56 -05:00
unicorn.h	New feature: registers can be bulk saved/restored in an opaque blob	2016-08-20 04:14:07 -07:00