Fredrik Noring b671293fe0 target/mips: Fix decoding mechanism of special R5900 opcodes ... MOVN, MOVZ, MFHI, MFLO, MTHI, MTLO, MULT, MULTU, DIV, DIVU, DMULT, DMULTU, DDIV, DDIVU and JR are decoded in decode_opc_special_tx79 instead of the generic decode_opc_special_legacy. Backports commit 9dc324ce66807cc231fe890d4031de595ad1cf72 from qemu		2018-11-23 18:35:55 -05:00
..
cp0_timer.c
cpu-qom.h
cpu.c
cpu.h	target/mips: Introduce MXU registers	2018-11-11 05:50:52 -05:00
dsp_helper.c
helper.c	target/mips: Implement hardware page table walker for MIPS32	2018-10-23 14:29:27 -04:00
helper.h	target/mips: Add CP0 PWCtl register	2018-10-23 14:23:04 -04:00
internal.h	target/mips: Implement hardware page table walker for MIPS32	2018-10-23 14:29:27 -04:00
lmi_helper.c
Makefile.objs
mips-defs.h	target/mips: Define a bit for MXU in insn_flags	2018-11-11 05:52:18 -05:00
msa_helper.c
op_helper.c	target/mips: Implement hardware page table walker for MIPS32	2018-10-23 14:29:27 -04:00
TODO
translate.c	target/mips: Fix decoding mechanism of special R5900 opcodes	2018-11-23 18:35:55 -05:00
translate_init.c	target/mips: Define the R5900 CPU	2018-11-10 12:11:11 -05:00
unicorn.c
unicorn.h