Tony Nguyen a95927de1d cputlb: Byte swap memory transaction attribute ... Notice new attribute, byte swap, and force the transaction through the memory slow path. Required by architectures that can invert endianness of memory transaction, e.g. SPARC64 has the Invert Endian TTE bit. Backports commit a26fc6f5152b47f1d7ed928f9c9d462d01ff1624 from qemu		2020-01-07 19:15:33 -05:00
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crypto	Drop unused crypto source files	2018-02-17 15:23:57 -05:00
exec	cputlb: Byte swap memory transaction attribute	2020-01-07 19:15:33 -05:00
fpu	fpu: make softfloat-macros self-contained	2019-11-18 21:10:39 -05:00
hw	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
qapi	qapi: Rewrite string-input-visitor's integer and list parsing	2018-12-18 04:57:25 -05:00
qemu	typedefs: Separate incomplete types and function types	2019-11-18 16:42:51 -05:00
qom	configure: Define target access alignment in configure	2019-11-18 21:41:35 -05:00
sysemu	accel: Remove unused AccelClass::available field	2019-05-03 11:31:27 -04:00
config.h	import	2015-08-21 15:04:50 +08:00
elf.h	include/elf: Update elf.h to commit f71a8eaffba3271cf7cdad95572f6996f7523a5b	2018-03-11 15:34:35 -04:00
glib_compat.h	target/arm/translate: Synchronize with Qemu	2019-04-27 10:13:01 -04:00
qemu-common.h	tcg: Add EXCP_ATOMIC	2018-02-27 11:57:58 -05:00