unicorn/qemu/target-i386
Evgeny Yakovlev fa9d708fbd
target-i386: Correct family/model/stepping for Opteron_G3
Current CPU definition for AMD Opteron third generation includes
features like SSE4a and LAHF_LM support in emulated CPUID. These
features are present in K8 rev.E or K10 CPUs and later. However,
current G3 family and model describe 2nd generation K8 cores instead.

This is incorrect but was considered harmless until our tests found a
problem with linux kernels >= 3.10 (and maybe earlier) which specifically
check for Opteron K8 model when parsing CPUID leaf 0x80000001:
http://lxr.free-electrons.com/source/arch/x86/kernel/cpu/amd.c?v=3.16#L552
This code will disable LAHF_LM feature in /proc/cpuinfo if model number
is inconsistent.

This change sets Opteron_G3 family/model/stepping to 16/2/3 which is
a proper Opteron 3rd generation 2350 CPU.

Backports commit 339892d758efb2d0954160d41736a0eac9875d67 from qemu
2018-02-26 04:59:18 -05:00
..
arch_memory_mapping.c x86: Clean up includes 2018-02-19 01:00:09 -05:00
bpt_helper.c cpu-exec: Rename cpu_resume_from_signal() to cpu_loop_exit_noexc() 2018-02-24 17:25:28 -05:00
cc_helper.c target-i386: Perform set/reset_inhibit_irq inline 2018-02-20 13:34:47 -05:00
cc_helper_template.h This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
cpu-qom.h target-i386: make cpu-qom.h not target specific 2018-02-24 00:55:22 -05:00
cpu.c target-i386: Correct family/model/stepping for Opteron_G3 2018-02-26 04:59:18 -05:00
cpu.h target-i386: Move xsave component mask to features array 2018-02-26 04:45:35 -05:00
excp_helper.c cpu: move exec-all.h inclusion out of cpu.h 2018-02-24 02:39:08 -05:00
fpu_helper.c target-i386: Use struct X86XSaveArea in fpu_helper.c 2018-02-26 03:38:53 -05:00
helper.c cpus: pass CPUState to run_on_cpu helpers 2018-02-26 04:54:55 -05:00
helper.h target-i386: implement PKE for TCG 2018-02-22 10:18:55 -05:00
int_helper.c cpu: move exec-all.h inclusion out of cpu.h 2018-02-24 02:39:08 -05:00
Makefile.objs target-i386: Enable control registers for MPX 2018-02-20 13:27:46 -05:00
mem_helper.c Fix confusing argument names in some common functions 2018-02-25 03:58:27 -05:00
misc_helper.c cpu: move exec-all.h inclusion out of cpu.h 2018-02-24 02:39:08 -05:00
mpx_helper.c cpu: move exec-all.h inclusion out of cpu.h 2018-02-24 02:39:08 -05:00
ops_sse.h target-i386: Rename XMM_[BWLSDQ] helpers to ZMM_* 2018-02-18 23:53:16 -05:00
ops_sse_header.h target-i386: Rename struct XMMReg to ZMMReg 2018-02-18 23:46:30 -05:00
seg_helper.c target-i386: Fixed syscall posssible segfault 2018-02-26 02:36:09 -05:00
shift_helper_template.h This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
smm_helper.c target-i386: Include log.h in smm_helper 2018-02-24 03:06:07 -05:00
svm.h Clean up ill-advised or unusual header guards 2018-02-25 04:22:46 -05:00
svm_helper.c cpu: move exec-all.h inclusion out of cpu.h 2018-02-24 02:39:08 -05:00
TODO import 2015-08-21 15:04:50 +08:00
topology.h pc: Add x86_topo_ids_from_apicid() 2018-02-25 20:31:36 -05:00
translate.c target-i386: Generate fences for x86 2018-02-26 03:28:31 -05:00
unicorn.c qemu-common: push cpu.h inclusion out of qemu-common.h 2018-02-24 01:50:56 -05:00
unicorn.h New feature: registers can be bulk saved/restored in an opaque blob 2016-08-20 04:14:07 -07:00