Fredrik Noring e9a4475a35 target/mips: Make R5900 DMULT[U], DDIV[U], LL[D] and SC[D] user only ... The Linux kernel traps certain reserved instruction exceptions to emulate the corresponding instructions. QEMU plays the role of the kernel in user mode, so those traps are emulated by accepting the instructions. This change adds the function check_insn_opc_user_only to signal a reserved instruction exception for flagged CPUs in QEMU system mode. The MIPS III instructions DMULT[U], DDIV[U], LL[D] and SC[D] are not implemented in R5900 hardware. They are trapped and emulated by the Linux kernel and, accordingly, therefore QEMU user only instructions. Backports commit 96631327be14c4f54cc31f873c278d9ffedd1e00 from qemu		2018-11-10 12:10:01 -05:00
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cp0_timer.c	mips: introduce internal.h and cleanup cpu.h	2018-03-05 00:25:56 -05:00
cpu-qom.h	mips: MIPSCPU model subclasses	2018-03-05 00:42:29 -05:00
cpu.c	target/mips/cpu: Use type_register instead of type_register_static() in mips_cpu_register_types()	2018-09-03 17:36:23 -04:00
cpu.h	target/mips: Add CP0 PWCtl register	2018-10-23 14:23:04 -04:00
dsp_helper.c	mips: Improve macro parenthesization	2018-03-05 00:51:51 -05:00
helper.c	target/mips: Implement hardware page table walker for MIPS32	2018-10-23 14:29:27 -04:00
helper.h	target/mips: Add CP0 PWCtl register	2018-10-23 14:23:04 -04:00
internal.h	target/mips: Implement hardware page table walker for MIPS32	2018-10-23 14:29:27 -04:00
lmi_helper.c	Move target-* CPU file into a target/ folder	2018-03-01 22:50:58 -05:00
Makefile.objs	mips: introduce internal.h and cleanup cpu.h	2018-03-05 00:25:56 -05:00
mips-defs.h	target/mips: Define R5900 ISA, MMI ASE, and R5900 CPU preprocessor constants	2018-11-10 11:29:25 -05:00
msa_helper.c	target/mips: Remove floatX_maybe_silence_nan from conversions	2018-05-19 23:25:04 -04:00
op_helper.c	target/mips: Implement hardware page table walker for MIPS32	2018-10-23 14:29:27 -04:00
TODO	Move target-* CPU file into a target/ folder	2018-03-01 22:50:58 -05:00
translate.c	target/mips: Make R5900 DMULT[U], DDIV[U], LL[D] and SC[D] user only	2018-11-10 12:10:01 -05:00
translate_init.c	target/mips: Improve DSP R2/R3-related naming	2018-10-23 13:42:01 -04:00
unicorn.c	Use DEFINE_MACHINE() to register all machines	2018-03-11 15:12:46 -04:00
unicorn.h	Move target-* CPU file into a target/ folder	2018-03-01 22:50:58 -05:00