Peter Maydell e9fb085aa1 target/arm: Add missing .cp = 15 to HMAIR1 and HAMAIR1 regdefs ... ARMCPRegInfo structs will default to .cp = 15 if they are ARM_CP_STATE_BOTH, but not if they are ARM_CP_STATE_AA32 (because a coprocessor number of 0 is valid for AArch32). We forgot to explicitly set .cp = 15 for the HMAIR1 and HAMAIR1 regdefs, which meant they would UNDEF when the guest tried to access them under cp15. Backports commit b5ede85bfb7ba1a8f6086494c82f400b29969f65 from qemu		2018-08-22 12:36:11 -04:00
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arm	target/arm: Add missing .cp = 15 to HMAIR1 and HAMAIR1 regdefs	2018-08-22 12:36:11 -04:00
i386	i386: Disable TOPOEXT by default on "-cpu host"	2018-08-17 14:34:02 -04:00
m68k	target/m68k: Merge disas_m68k_insn into m68k_tr_translate_insn	2018-06-15 11:40:18 -04:00
mips	target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0	2018-08-17 14:25:22 -04:00
sparc	tcg: Pass tb and index to tcg_gen_exit_tb separately	2018-06-07 11:56:32 -04:00