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unicorn/qemu/target
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Bastian Koppelmann f91f286ed2
target/riscv: Remove manual decoding from gen_load() 
With decodetree we don't need to convert RISC-V opcodes into to MemOps
as the old gen_load() did.

Backports commit 98898b20e9cca462843c22ad952c216ffd57d654 from qemu
2019-03-19 05:02:25 -04:00
..
arm Add ARM MSP, PSP and CONTROL register access (#1071) 2019-03-08 02:24:49 -05:00
i386 i386: extended the cpuid_level when Intel PT is enabled 2019-03-11 16:40:23 -04:00
m68k target/m68k: Correct instruction emulation 2019-02-28 19:21:49 -05:00
mips target/mips: Restore Qemu's organization of CPU definitions 2019-03-08 01:40:50 -05:00
riscv target/riscv: Remove manual decoding from gen_load() 2019-03-19 05:02:25 -04:00
sparc target: Resolve repeated typedef warnings 2019-01-22 20:27:35 -05:00