init commit

This commit is contained in:
Lea 2023-01-22 21:50:58 +01:00
commit 072686ea8d
Signed by untrusted user: Lea
GPG key ID: 1BAFFE8347019C42
9 changed files with 110 additions and 0 deletions

1
.gitignore vendored Normal file
View file

@ -0,0 +1 @@
/target

7
Cargo.lock generated Normal file
View file

@ -0,0 +1,7 @@
# This file is automatically @generated by Cargo.
# It is not intended for manual editing.
version = 3
[[package]]
name = "invadeez"
version = "0.1.0"

12
Cargo.toml Normal file
View file

@ -0,0 +1,12 @@
[package]
name = "invadeez"
version = "0.1.0"
edition = "2021"
# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
[dependencies]
[[bin]]
name = "decompiler"
path = "src/decompiler/main.rs"

BIN
rom/invaders Normal file

Binary file not shown.

BIN
rom/invaders.e Normal file

Binary file not shown.

BIN
rom/invaders.f Normal file

Binary file not shown.

BIN
rom/invaders.g Normal file

Binary file not shown.

BIN
rom/invaders.h Normal file

Binary file not shown.

90
src/decompiler/main.rs Normal file
View file

@ -0,0 +1,90 @@
use std::fs;
use core::slice::Iter;
fn main() {
let file = fs::read("/home/lea/Downloads/invadeez/invadeez/rom/invaders.h").expect("where file");
let mut data = file.iter();
while let Some(byte) = data.next() {
fn next(data: &mut Iter<u8>, len: u8) -> String {
let mut res = String::new();
for _ in 0..len {
res.insert_str(0, format!("{:x}", data.next().expect("Expected data")).as_str());
}
return res;
}
// http://www.emulator101.com/reference/8080-by-opcode.html
let instruction: String = match byte {
0x00 => format!("NOP"),
0x01 => format!("LXI B,#${}", next(&mut data, 2)),
0x02 => format!("STAX B"),
0x03 => format!("INX B"),
0x04 => format!("INR B"),
0x05 => format!("DCR B"),
0x06 => format!("MVI B,#0x{}", next(&mut data, 1)),
0x07 => format!("RLC"),
0x09 => format!("DAD B"),
0x0a => format!("LDAX B"),
0x0b => format!("DCX B"),
0x0c => format!("INR C"),
0x0d => format!("DCR C"),
0x0e => format!("MVI C,#0x{}", next(&mut data, 1)),
0x0f => format!("RRC"),
0x11 => format!("LXI D,#0x{}", next(&mut data, 2)),
0x12 => format!("STAX D"),
0x13 => format!("INX D"),
0x14 => format!("INR D"),
0x15 => format!("DCR D"),
0x16 => format!("MVI D,#0x{}", next(&mut data, 1)),
0x17 => format!("RAL"),
0x19 => format!("DAD D"),
0x1a => format!("LDAX D"),
0x1b => format!("DCX D"),
0x1c => format!("INR E"),
0x1d => format!("DCR E"),
0x1e => format!("MVI E,#0x{}", next(&mut data, 1)),
0x1f => format!("RAR"),
0x21 => format!("LXI H,#0x{}", next(&mut data, 2)),
0x22 => format!("SLHD %0x{}", next(&mut data, 2)),
0x23 => format!("INX H"),
0x24 => format!("INR H"),
0x25 => format!("DCR H"),
0x26 => format!("MVI H,{}", next(&mut data, 1)),
0x27 => format!("DAA"),
0x29 => format!("DAD H"),
0x2a => format!("LHLD ${}", next(&mut data, 2)),
0x2b => format!("DCX H"),
0x2c => format!("INR L"),
0x2d => format!("DCR L"),
0x2e => format!("MVI L,#0x{}", next(&mut data, 1)),
0x2f => format!("CMA"),
0x31 => format!("LXI SP,#0x{}", next(&mut data, 2)),
0x32 => format!("STA ${}", next(&mut data, 2)),
0x33 => format!("INX SP"),
0x34 => format!("INR M"),
0x35 => format!("DCR M"),
0x36 => format!("MVI M,#0x{}", next(&mut data, 1)),
0x37 => format!("STC"),
0x39 => format!("DAD SP"),
0x3a => format!("LDA ${}", next(&mut data, 2)),
0x3b => format!("DCX SP"),
0x3c => format!("INR A"),
0x3d => format!("DCR A"),
0x3e => format!("MVI A,#0x{}", next(&mut data, 1)),
0x3f => format!("CMC"),
// -- continue here --
0xc3 => format!("JMP ${}", next(&mut data, 2)),
0xc5 => format!("PUSH B"),
0xd5 => format!("PUSH D"),
0xe5 => format!("PUSH H"),
0xf5 => format!("PUSH PSW"),
_ => panic!("Unimplemented instruction {:#x}", byte),
};
println!("{}", instruction);
}
}