forked from Lea/invadeez
Display memory location next to instructions
This commit is contained in:
parent
44930070c2
commit
09e60b33f3
2
.gitignore
vendored
2
.gitignore
vendored
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@ -1,3 +1,3 @@
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/target
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/target
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test/
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test/
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output
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@ -1,9 +1,9 @@
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#![allow(clippy::useless_format)]
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#![allow(clippy::useless_format)]
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#![allow(clippy::too_many_lines)]
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#![allow(clippy::too_many_lines)]
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use core::slice::Iter;
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use std::{env, fs};
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use std::{env, fs};
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const REGISTERS: [&str; 8] = ["B", "C", "D", "E", "H", "L", "M", "A"];
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const REGISTERS: [&str; 8] = ["B", "C", "D", "E", "H", "L", "M", "A"];
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const PRINT_MEMLOC: bool = true;
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fn main() {
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fn main() {
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let mut args = env::args();
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let mut args = env::args();
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@ -12,80 +12,85 @@ fn main() {
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.expect("Provide a path to a file to disassemble as an argument");
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.expect("Provide a path to a file to disassemble as an argument");
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let file = fs::read(filename).expect("where file");
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let file = fs::read(filename).expect("where file");
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let mut data = file.iter();
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let mut data = file.iter();
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let mut index: u32 = 0;
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while let Some(byte) = data.next() {
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while let Some(byte) = data.next() {
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fn next(data: &mut Iter<u8>, len: u8) -> String {
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let current_index = index.clone();
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index += 1;
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let mut next = |len: u8| {
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let mut res = String::new();
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let mut res = String::new();
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index += len as u32;
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for _ in 0..len {
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for _ in 0..len {
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res.insert_str(
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res.insert_str(
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0,
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0,
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format!("{:x}", data.next().expect("Expected data")).as_str(),
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format!("{:02x}", data.next().expect("Expected data")).as_str(),
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);
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);
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}
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}
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res
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res
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}
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};
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// http://www.emulator101.com/reference/8080-by-opcode.html
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// http://www.emulator101.com/reference/8080-by-opcode.html
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let instruction: String = match byte {
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let instruction: String = match byte {
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0x00 => format!("NOP"),
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0x00 => format!("NOP"),
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0x01 => format!("LXI B,#${}", next(&mut data, 2)),
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0x01 => format!("LXI B,#${}", next(2)),
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0x02 => format!("STAX B"),
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0x02 => format!("STAX B"),
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0x03 => format!("INX B"),
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0x03 => format!("INX B"),
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0x04 => format!("INR B"),
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0x04 => format!("INR B"),
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0x05 => format!("DCR B"),
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0x05 => format!("DCR B"),
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0x06 => format!("MVI B,#${}", next(&mut data, 1)),
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0x06 => format!("MVI B,#${}", next(1)),
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0x07 => format!("RLC"),
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0x07 => format!("RLC"),
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0x09 => format!("DAD B"),
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0x09 => format!("DAD B"),
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0x0a => format!("LDAX B"),
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0x0a => format!("LDAX B"),
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0x0b => format!("DCX B"),
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0x0b => format!("DCX B"),
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0x0c => format!("INR C"),
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0x0c => format!("INR C"),
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0x0d => format!("DCR C"),
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0x0d => format!("DCR C"),
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0x0e => format!("MVI C,#${}", next(&mut data, 1)),
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0x0e => format!("MVI C,#${}", next(1)),
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0x0f => format!("RRC"),
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0x0f => format!("RRC"),
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0x11 => format!("LXI D,#${}", next(&mut data, 2)),
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0x11 => format!("LXI D,#${}", next(2)),
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0x12 => format!("STAX D"),
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0x12 => format!("STAX D"),
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0x13 => format!("INX D"),
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0x13 => format!("INX D"),
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0x14 => format!("INR D"),
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0x14 => format!("INR D"),
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0x15 => format!("DCR D"),
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0x15 => format!("DCR D"),
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0x16 => format!("MVI D,#${}", next(&mut data, 1)),
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0x16 => format!("MVI D,#${}", next(1)),
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0x17 => format!("RAL"),
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0x17 => format!("RAL"),
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0x19 => format!("DAD D"),
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0x19 => format!("DAD D"),
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0x1a => format!("LDAX D"),
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0x1a => format!("LDAX D"),
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0x1b => format!("DCX D"),
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0x1b => format!("DCX D"),
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0x1c => format!("INR E"),
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0x1c => format!("INR E"),
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0x1d => format!("DCR E"),
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0x1d => format!("DCR E"),
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0x1e => format!("MVI E,#${}", next(&mut data, 1)),
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0x1e => format!("MVI E,#${}", next(1)),
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0x1f => format!("RAR"),
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0x1f => format!("RAR"),
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0x21 => format!("LXI H,#${}", next(&mut data, 2)),
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0x21 => format!("LXI H,#${}", next(2)),
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0x22 => format!("SLHD #${}", next(&mut data, 2)),
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0x22 => format!("SLHD #${}", next(2)),
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0x23 => format!("INX H"),
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0x23 => format!("INX H"),
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0x24 => format!("INR H"),
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0x24 => format!("INR H"),
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0x25 => format!("DCR H"),
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0x25 => format!("DCR H"),
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0x26 => format!("MVI H,#${}", next(&mut data, 1)),
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0x26 => format!("MVI H,#${}", next(1)),
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0x27 => format!("DAA"),
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0x27 => format!("DAA"),
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0x29 => format!("DAD H"),
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0x29 => format!("DAD H"),
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0x2a => format!("LHLD ${}", next(&mut data, 2)),
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0x2a => format!("LHLD ${}", next(2)),
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0x2b => format!("DCX H"),
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0x2b => format!("DCX H"),
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0x2c => format!("INR L"),
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0x2c => format!("INR L"),
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0x2d => format!("DCR L"),
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0x2d => format!("DCR L"),
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0x2e => format!("MVI L,#${}", next(&mut data, 1)),
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0x2e => format!("MVI L,#${}", next(1)),
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0x2f => format!("CMA"),
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0x2f => format!("CMA"),
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0x31 => format!("LXI SP,#${}", next(&mut data, 2)),
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0x31 => format!("LXI SP,#${}", next(2)),
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0x32 => format!("STA ${}", next(&mut data, 2)),
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0x32 => format!("STA ${}", next(2)),
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0x33 => format!("INX SP"),
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0x33 => format!("INX SP"),
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0x34 => format!("INR M"),
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0x34 => format!("INR M"),
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0x35 => format!("DCR M"),
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0x35 => format!("DCR M"),
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0x36 => format!("MVI M,#${}", next(&mut data, 1)),
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0x36 => format!("MVI M,#${}", next(1)),
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0x37 => format!("STC"),
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0x37 => format!("STC"),
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0x39 => format!("DAD SP"),
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0x39 => format!("DAD SP"),
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0x3a => format!("LDA ${}", next(&mut data, 2)),
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0x3a => format!("LDA ${}", next(2)),
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0x3b => format!("DCX SP"),
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0x3b => format!("DCX SP"),
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0x3c => format!("INR A"),
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0x3c => format!("INR A"),
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0x3d => format!("DCR A"),
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0x3d => format!("DCR A"),
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0x3e => format!("MVI A,#${}", next(&mut data, 1)),
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0x3e => format!("MVI A,#${}", next(1)),
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0x3f => format!("CMC"),
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0x3f => format!("CMC"),
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0x76 => format!("HLT ; Trigger interrupt"),
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0x76 => format!("HLT ; Trigger interrupt"),
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0x40..=0x7f // Test this!
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0x40..=0x7f // Test this!
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@ -108,66 +113,71 @@ fn main() {
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=> format!("CMP {}", REGISTERS[(byte & 0b111) as usize]),
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=> format!("CMP {}", REGISTERS[(byte & 0b111) as usize]),
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0xc0 => format!("RNZ"),
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0xc0 => format!("RNZ"),
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0xc1 => format!("POP B"),
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0xc1 => format!("POP B"),
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0xc2 => format!("JNZ ${}", next(&mut data, 2)),
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0xc2 => format!("JNZ ${}", next(2)),
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0xc3 => format!("JMP ${}", next(&mut data, 2)),
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0xc3 => format!("JMP ${}", next(2)),
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0xc4 => format!("CNZ ${}", next(&mut data, 2)),
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0xc4 => format!("CNZ ${}", next(2)),
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0xc5 => format!("PUSH B"),
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0xc5 => format!("PUSH B"),
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0xc6 => format!("ADI #${}", next(&mut data, 1)),
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0xc6 => format!("ADI #${}", next(1)),
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0xc7 => format!("RST 0 ; CALL $0"),
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0xc7 => format!("RST 0 ; CALL $0"),
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0xc8 => format!("RZ"),
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0xc8 => format!("RZ"),
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0xc9 => format!("RET"),
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0xc9 => format!("RET"),
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0xca => format!("JZ ${}", next(&mut data, 2)),
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0xca => format!("JZ ${}", next(2)),
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0xcc => format!("CZ ${}", next(&mut data, 2)),
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0xcc => format!("CZ ${}", next(2)),
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0xcd => format!("CALL ${}", next(&mut data, 2)),
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0xcd => format!("CALL ${}", next(2)),
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0xce => format!("ACI #${}", next(&mut data, 1)),
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0xce => format!("ACI #${}", next(1)),
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0xcf => format!("RST 1 ; CALL $8"),
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0xcf => format!("RST 1 ; CALL $8"),
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0xd0 => format!("RNC"),
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0xd0 => format!("RNC"),
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0xd1 => format!("POP D"),
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0xd1 => format!("POP D"),
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0xd2 => format!("JNC ${}", next(&mut data, 2)),
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0xd2 => format!("JNC ${}", next(2)),
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0xd3 => format!("OUT #${}", next(&mut data, 1)),
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0xd3 => format!("OUT #${}", next(1)),
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0xd4 => format!("CNC ${}", next(&mut data, 2)),
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0xd4 => format!("CNC ${}", next(2)),
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0xd5 => format!("PUSH D"),
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0xd5 => format!("PUSH D"),
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0xd6 => format!("SUI #${}", next(&mut data, 1)),
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0xd6 => format!("SUI #${}", next(1)),
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0xd7 => format!("RST 2 ; CALL $10"),
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0xd7 => format!("RST 2 ; CALL $10"),
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0xd8 => format!("RC"),
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0xd8 => format!("RC"),
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0xda => format!("JC ${}", next(&mut data, 2)),
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0xda => format!("JC ${}", next(2)),
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0xdb => format!("IN #${}", next(&mut data, 1)),
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0xdb => format!("IN #${}", next(1)),
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0xdc => format!("CC ${}", next(&mut data, 2)),
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0xdc => format!("CC ${}", next(2)),
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0xde => format!("SBI #${}", next(&mut data, 1)),
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0xde => format!("SBI #${}", next(1)),
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0xdf => format!("RST 3 ; $CALL 18"),
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0xdf => format!("RST 3 ; $CALL 18"),
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0xe0 => format!("RPO"),
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0xe0 => format!("RPO"),
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0xe1 => format!("POP H"),
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0xe1 => format!("POP H"),
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0xe2 => format!("JPO ${}", next(&mut data, 2)),
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0xe2 => format!("JPO ${}", next(2)),
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0xe3 => format!("XTHL"),
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0xe3 => format!("XTHL"),
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0xe4 => format!("CPO ${}", next(&mut data, 2)),
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0xe4 => format!("CPO ${}", next(2)),
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0xe5 => format!("PUSH H"),
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0xe5 => format!("PUSH H"),
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0xe6 => format!("ANI #${}", next(&mut data, 1)),
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0xe6 => format!("ANI #${}", next(1)),
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0xe7 => format!("RST 4 ; CALL $20"),
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0xe7 => format!("RST 4 ; CALL $20"),
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0xe8 => format!("RPE"),
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0xe8 => format!("RPE"),
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0xe9 => format!("PCHL"),
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0xe9 => format!("PCHL"),
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0xea => format!("JPE ${}", next(&mut data, 2)),
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0xea => format!("JPE ${}", next(2)),
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0xeb => format!("XCHG"),
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0xeb => format!("XCHG"),
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0xec => format!("CPE ${}", next(&mut data, 2)),
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0xec => format!("CPE ${}", next(2)),
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0xee => format!("XRI #${}", next(&mut data, 1)),
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0xee => format!("XRI #${}", next(1)),
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0xef => format!("RST 5 ; CALL $28"),
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0xef => format!("RST 5 ; CALL $28"),
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0xf0 => format!("RP"),
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0xf0 => format!("RP"),
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0xf1 => format!("POP PSW"),
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0xf1 => format!("POP PSW"),
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0xf2 => format!("JP ${}", next(&mut data, 2)),
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0xf2 => format!("JP ${}", next(2)),
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0xf3 => format!("DI"),
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0xf3 => format!("DI"),
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0xf4 => format!("CP ${}", next(&mut data, 2)),
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0xf4 => format!("CP ${}", next(2)),
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0xf5 => format!("PUSH PSW"),
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0xf5 => format!("PUSH PSW"),
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0xf6 => format!("ORI #${}", next(&mut data, 1)),
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0xf6 => format!("ORI #${}", next(1)),
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0xf7 => format!("RST 6 ; CALL $30"),
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0xf7 => format!("RST 6 ; CALL $30"),
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0xf8 => format!("RM"),
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0xf8 => format!("RM"),
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0xf9 => format!("SPHL"),
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0xf9 => format!("SPHL"),
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0xfa => format!("JM ${}", next(&mut data, 2)),
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0xfa => format!("JM ${}", next(2)),
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0xfb => format!("EI"),
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0xfb => format!("EI"),
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0xfc => format!("CM ${}", next(&mut data, 2)),
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0xfc => format!("CM ${}", next(2)),
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0xfe => format!("CPI #${}", next(&mut data, 1)),
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0xfe => format!("CPI #${}", next(1)),
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0xff => format!("RST 7 ; CALL $38"),
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0xff => format!("RST 7 ; CALL $38"),
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_ => panic!("Unimplemented instruction {byte:#x}"),
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_ => format!("; Unknown instruction {byte:#x}"),
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// _ => panic!("Unimplemented instruction {byte:#x}"),
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};
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};
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println!("{instruction}");
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if PRINT_MEMLOC {
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println!("{:04x} {}", current_index, instruction);
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} else {
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println!("{instruction}");
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}
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}
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}
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}
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}
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