forked from Lea/invadeez
Add ACI, DAD
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@ -30,3 +30,26 @@ pub fn adc(register: Register, state: &mut EmulatorState) {
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set_cc(state, result, 0b1111);
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state.a = (result & 0xff) as u8;
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}
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/// Add values of input byte and `A` and add +1 if carry bit is set
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pub fn aci(byte: u8, state: &mut EmulatorState) {
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let result = state.a as u16 + byte as u16 + if state.cc.c { 1 } else { 0 };
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set_cc(state, result, 0b1111);
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state.a = result as u8;
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}
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/// Double precision add - Add B&C, D&E or H&L to H&L
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pub fn dad(register: Register, state: &mut EmulatorState) {
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let num = match register {
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Register::B => (state.b as u16) << 8 | state.c as u16,
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Register::D => (state.d as u16) << 8 | state.e as u16,
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Register::H => get_register(Register::M, state),
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Register::SP => state.sp,
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_ => panic!("Cannot perform DAD on register {:?}", register),
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};
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let result = num as u32 + get_register(Register::M, state) as u32;
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state.cc.c = result > 0xffff;
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state.h = (result >> 8) as u8;
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state.l = result as u8;
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}
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@ -36,9 +36,11 @@ pub struct ConditionCodes {
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}
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#[derive(PartialEq)]
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#[derive(Debug)]
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pub enum Register {
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B, C, D, E,
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H, L, M, A,
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SP,
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}
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/// Returns a Register enum based on the input number 0..7 in the order B,C,D,E,H,L,M,A
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@ -66,6 +68,7 @@ fn get_register(register: Register, state: &EmulatorState) -> u16 {
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Register::L => state.l as u16,
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Register::A => state.a as u16,
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Register::M => (state.memory[(state.h as usize)] as u16) << 8 | (state.memory[state.l as usize] as u16),
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Register::SP => state.sp,
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}
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}
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@ -79,6 +82,7 @@ fn set_register(register: Register, value: u8, state: &mut EmulatorState) {
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Register::L => state.l = value,
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Register::A => state.a = value,
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Register::M => panic!("Cannot set pseudoregister 'M'"),
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Register::SP => panic!("Cannot set 'SP' through set_register()"),
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};
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}
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@ -123,9 +127,19 @@ fn tick(state: &mut EmulatorState) {
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match instruction {
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0x00 => {} // NOP
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/* ADD */
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// DAD
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0x09 => arithmetic::dad(Register::B, state),
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0x19 => arithmetic::dad(Register::D, state),
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0x29 => arithmetic::dad(Register::H, state),
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0x39 => arithmetic::dad(Register::SP, state),
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0x80..=0x87 => arithmetic::add(register_from_num(instruction & 0xf), state), // ADD
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0x88..=0x8f => arithmetic::adc(register_from_num(instruction & 0xf), state), // ADC
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0xc6 => arithmetic::adi(next_byte(), state), // ADI
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0xce => arithmetic::aci(next_byte(), state), // ACI
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_ => not_implemented(state),
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}
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