Commit graph

133 commits

Author SHA1 Message Date
Laurent Vivier 6487da53eb
target/m68k: softmmu cleanup
don't compile supervisor only instructions in linux-user mode

Backports commit 6ad257641d60f8c4a47972af9027b1c9bb5af787 from qemu
2018-03-06 08:22:39 -05:00
Laurent Vivier 03096cb560
target/m68k: add move16
move16 moves the source line to the destination line. Lines are aligned
to 16-byte boundaries and are 16 bytes long.

Backports commit 9d4f0429f3dc1dc6c67de3eaa3106e6c1cfa1524 from qemu
2018-03-06 08:15:33 -05:00
Laurent Vivier c652028eb5
target/m68k: add chk and chk2
chk and chk2 compare a value to boundaries, and
trigger a CHK exception if the value is out of bounds.

Backports commit 8bf6cbaf396a8b54b138bb8a7c3377f2868ed16e from qemu
2018-03-06 08:08:53 -05:00
Laurent Vivier 172f3709e3
target/m68k: manage 680x0 stack frames
680x0 manages several stack frame formats:
- format 0: four-word stack frame
- format 1: four-word throwaway stack frame
- format 2: six-word stack frame
- format 3: Floating-Point post-instruction stack frame
- format 4: eight-word stack frame
- format 7: access-error stack frame

Backports commit d2f8fb8e7f8e7d082103d705e178c9f72e0bea77 from qemu
2018-03-06 08:04:08 -05:00
Laurent Vivier 134916d653
target/m68k: add CPU_LOG_INT trace
Display the interrupts/exceptions information
in QEMU logs (-d int)

Backports commit 5beb144e04f44772804ac8405b6a54a17fe78909 from qemu
2018-03-06 07:58:38 -05:00
Laurent Vivier 6d46cb09dc
target/m68k: use insn_pc to generate instruction fault address
Backports commit 16a14cdf575a2eda4698930d22b75072537754dd from qemu
2018-03-06 07:51:28 -05:00
Laurent Vivier 3a12e69ad6
target/m68k: fix gen_get_ccr()
As gen_helper_get_ccr() is able to compute CCR from cc_op and
flags, we don't need to flush flags before to call it.
flush_flags() and get_ccr() use COMPUTE_CCR() to compute
flags. get_ccr() computes CCR value,
whereas flush_flags update live cc_op and flags.

Backports commit 4131c242cc850aaf76e59d4c787d220f07850cf5 from qemu
2018-03-06 07:47:25 -05:00
Laurent Vivier 57d48199a8
target-m68k: sync CC_OP before gen_jmp_tb()
And remove update_cc_op() from gen_exception() because there is
one in gen_jmp_im().

Backports commit 7cd7b5ca9be805e8a4ced4c07014c24e34812f27 from qemu
2018-03-06 07:46:46 -05:00
Richard Henderson 5f074f09ab
tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED*
These are now trivial sets and tests against NULL. Unwrap.

Backports commit f764718d0cb30af9f1f8e1d6a33622cc05ca4155 from qemu
2018-03-05 15:58:15 -05:00
Alex Bennée 8e973e762d
target/*helper: don't check retaddr before calling cpu_restore_state
cpu_restore_state officially supports being passed an address it can't
resolve the state for. As a result the checks in the helpers are
superfluous and can be removed. This makes the code consistent with
other users of cpu_restore_state.

Of course this does nothing to address what to do if cpu_restore_state
can't resolve the state but so far it seems this is handled elsewhere.

The change was made with included coccinelle script.

Backports commit 65255e8efdd5fca602bcc4ff61a879939ff75f4f from qemu
2018-03-05 14:47:41 -05:00
Laurent Vivier 4db1e153ae
target/m68k: fix set_cc_op()
The first call of set_cc_op() in a new translation sequence
is done with old_op set to CC_OP_DYNAMIC (-1).

This will do an out of bound access to the array cc_op_live[].

We fix that by adding an entry in cc_op_live[] for CC_OP_DYNAMIC.

Backports commit 7deddf96e94f3e1eb3677db0ea7b53e61751b544 from qemu
2018-03-05 14:44:38 -05:00
Richard Henderson 28061c2e59
qom: Introduce CPUClass.tcg_initialize
Move target cpu tcg initialization to common code,
called from cpu_exec_realizefn.

Backports commit 55c3ceef61fcf06fc98ddc752b7cce788ce7680b from qemu
2018-03-05 09:49:26 -05:00
Richard Henderson 4d9c8583fa
tcg: Remove TCGV_EQUAL*
When we used structures for TCGv_*, we needed a macro in order to
perform a comparison. Now that we use pointers, this is just clutter

Backports commit 11f4e8f8bfaa2caaab24bef6bbbb8a0205015119 from qemu
2018-03-05 09:16:07 -05:00
Kamil Rytarowski b10922fb33
target/m68k: Switch fpu_rom from make_floatx80() to make_floatx80_init()
GCC 4.7.2 on SunOS reports that the values assigned to array members are not
real constants:

target/m68k/fpu_helper.c:32:5: error: initializer element is not constant
target/m68k/fpu_helper.c:32:5: error: (near initialization for 'fpu_rom[0]')
rules.mak:66: recipe for target 'target/m68k/fpu_helper.o' failed

Convert the array to make_floatx80_init() to fix it.
Replace floatx80_pi-like constants with make_floatx80_init() as they are
defined as make_floatx80().

This fixes build on SmartOS (Joyent).

Backports commit 6fa9ba09dbf4eb8b52bcb47d6820957f1b77ee0b from qemu
2018-03-04 23:05:01 -05:00
Paolo Bonzini 6997a5a090
gen-icount: check cflags instead of use_icount global
Backports commit cd42d5b23691ad73edfd6dbcfc935a960a9c5a65 from qemu
2018-03-04 14:26:26 -05:00
Lluís Vilanova 3a196c62ae
target: [tcg] Use a generic enum for DISAS_ values
Used later. An enum makes expected values explicit and
bounds the value space of switches.

Backports commit 77fc6f5e28667634916f114ae04c6029cd7b9c45 from qemu
2018-03-04 14:08:43 -05:00
Lluís Vilanova 32b3c3815d
tcg: Pass generic CPUState to gen_intermediate_code()
Needed to implement a target-agnostic gen_intermediate_code()
in the future.

Backports commit 9c489ea6bed134fecfd556b439c68bba48fbe102 from qemu
2018-03-03 23:34:18 -05:00
Philippe Mathieu-Daudé e5486b636b
target/m68k: optimize bcd_flags() using extract op
Done with the Coccinelle semantic patch
scripts/coccinelle/tcg_gen_extract.cocci.

Backports commit 0d9acef24062844b96c671b4379d9fb03c3ea606 from qemu
2018-03-03 23:09:13 -05:00
Laurent Vivier 8a7f7242cc
target/m68k: add fmovem
Backports commit a1e58ddcb3eed7ec4a158512b9dae46f90492c1b from qemu
2018-03-03 21:05:56 -05:00
Laurent Vivier 50b639098c
target/m68k: add explicit single and double precision operations (part 2)
Add fsabs, fdabs, fsneg, fdneg, fsmove and fdmove.

The value is converted using the new floatx80_round() function.

Backports commit 77bdb2292492fafc4bc0fbb4d8c44fdd0ef1fa8e from qemu
2018-03-03 21:02:52 -05:00
Laurent Vivier 1d5e30f30c
target/m68k: add fsglmul and fsgldiv
fsglmul and fsgldiv truncate data to single precision before computing
results.

Backports commit 2f77995cebc8027851b8ea8f02c097fb8cdf668a from qemu
2018-03-03 20:59:20 -05:00
Laurent Vivier 20b610390d
target/m68k: add explicit single and double precision operations
Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul,
fsdiv, fddiv.

The precision is managed using set_floatx80_rounding_precision().

Backports commit a51b6bc38bb9b73a40e9486b52be12c810c6f2d9 from qemu
2018-03-03 20:55:41 -05:00
Laurent Vivier 0b62df7f30
target/m68k: add fmovecr
fmovecr moves a floating point constant from the
FPU ROM to a floating point register.

Backports commit 9d403660d91229922c2786e81c23cc9dd8e644f1 from qemu
2018-03-03 20:51:21 -05:00
Laurent Vivier ed3e8ab460
target/m68k: add fscc.
use DisasCompare with FPU conditions in fscc and fbcc.

Backports commit dd337bf86214e2436833d9442c995df95b136190 from qemu
2018-03-03 20:43:08 -05:00
Laurent Vivier f7ef6b49a8
target-m68k: add FPCR and FPSR
Backports commit ba62494483ab51ee31c70952b6ce5171a31860b1 from qemu
2018-03-03 19:51:31 -05:00
Laurent Vivier 1c6b1e2b9f
target-m68k: use floatx80 internally
Coldfire uses float64, but 680x0 use floatx80.
This patch introduces the use of floatx80 internally
and enables 680x0 80bits FPU.

Backports commit f83311e4764f1f25a8abdec2b32c64483be1759b from qemu
2018-03-03 19:35:17 -05:00
Laurent Vivier 92555a1134
target-m68k: initialize FPU registers
on reset, set FP registers to NaN and control registers to 0

Backports commit f4a6ce5155aab2a7ed7b9032a72187b37b3bfffe from qemu
2018-03-03 18:51:37 -05:00
Laurent Vivier d92621522a
target-m68k: move fmove CR to a function
Move code of fmove to/from control register to a function

Backports commit 860b9ac779615fe9315cd58165652052ac165a92 from qemu
2018-03-03 18:49:49 -05:00
Laurent Vivier da4d407317
target-m68k: define ext_opsize
Backports commit 69e698220f68a17ce9584b068f68ed09e527a6ad from qemu
2018-03-03 15:05:55 -05:00
Laurent Vivier 409369a7ce
target-m68k: move FPU helpers to fpu_helper.c
Backports commit c88f8107b14456d514b00571b0675cb532e82cad from qemu
2018-03-03 15:04:05 -05:00
Laurent Vivier 68c9ab9b77
target/m68k: fix V flag for CC_OP_SUBx
V flag for subtraction is:

v = (res ^ src1) & (src1 ^ src2)

(see COMPUTE_CCR() in target/m68k/helper.c)

But gen_flush_flags() uses:

v = (res ^ src2) & (src1 ^ src2)

The problem has been found with the following program:

.global _start
_start:
move.l #-2147483648,%d0
subq.l #1,%d0
jvc 1f
move.l #1,%d1
move.l #1,%d0
trap #0
1:
move.l #0,%d1
move.l #1,%d0
trap #0

It works fine (exit(1)) on real hardware, and with "-singlestep".

"-singlestep" uses gen_helper_flush_flags(), whereas
without "-singlestep", V flag is computed directly in
gen_flush_flags().

This patch updates gen_flush_flags() to have the same result
as with gen_helper_flush_flags().

Backports commit 043b936ef6fe53396b3c6b8f5562ea3e238a071d from qemu
2018-03-03 14:59:20 -05:00
Laurent Vivier ce25609ed3
target/m68k: implement rtd
Add "Return and Deallocate" (rtd) instruction.

RTD #d

(SP) -> PC
SP + 4 + d -> SP

Backports commit 18059c9e1648bf4fc5c7c1bae6f54690742b05ba from qemu
2018-03-03 14:27:01 -05:00
Thomas Huth b2f1326437
Move target-* CPU file into a target/ folder
We've currently got 18 architectures in QEMU, and thus 18 target-xxx
folders in the root folder of the QEMU source tree. More architectures
(e.g. RISC-V, AVR) are likely to be included soon, too, so the main
folder of the QEMU sources slowly gets quite overcrowded with the
target-xxx folders.
To disburden the main folder a little bit, let's move the target-xxx
folders into a dedicated target/ folder, so that target-xxx/ simply
becomes target/xxx/ instead.

Backports commit fcf5ef2ab52c621a4617ebbef36bf43b4003f4c0 from qemu
2018-03-01 22:50:58 -05:00