Richard Henderson
dd1ec408e5
target-*: Increment num_insns immediately after tcg_gen_insn_start
...
This does tidy the icount test common to all targets.
Backports commit 959082fc4a93a016a6b697e1e0c2b373d8a3a373 from qemu
2018-02-11 12:46:30 -05:00
Richard Henderson
a64d0ff657
target-*: Unconditionally emit tcg_gen_insn_start
...
While we're at it, emit the opcode adjacent to where we currently
record data for search_pc. This puts gen_io_start et al on the
"correct" side of the marker.
Backports commit 667b8e29c5b1d8c5b4e6ad5f780ca60914eb6e96 from qemu
2018-02-11 12:41:20 -05:00
Lioncash
b3f9ff667b
tcg: Rename debug_insn_start to insn_start
...
With an eye toward making it mandatory.
Backports commit 765b842adec4c5a359e69ca08785553599f71496 from qemu
2018-02-11 12:34:01 -05:00
Richard Henderson
a3aaf5a864
tcg: Remove tcg_gen_trunc_i64_i32
...
Replacing it with tcg_gen_extrl_i64_i32.
Backports commit ecc7b3aa71f5fdcf9ee87e74ca811d988282641d from qemu
2018-02-10 23:11:02 -05:00
Richard Henderson
232632e76c
tcg: Change translator-side labels to a pointer
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This is improved type checking for the translators -- it's no longer
possible to accidentally swap arguments to the branch functions.
Note that the code generating backends still manipulate labels as int.
With notable exceptions, the scope of the change is just a few lines
for each target, so it's not worth building extra machinery to do this
change in per-target increments.
Backports commit 42a268c241183877192c376d03bd9b6d527407c7 from qemu
2018-02-09 14:17:56 -05:00
Lioncash
0273e6ae18
tcg: Put opcodes in a linked list
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The previous setup required ops and args to be completely sequential,
and was error prone when it came to both iteration and optimization.
2018-02-09 12:54:05 -05:00
Richard Henderson
a41b9acc0c
tcg: Introduce tcg_op_buf_count and tcg_op_buf_full
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The method by which we count the number of ops emitted
is going to change. Abstract that away into some inlines.
Backports commit fe700adb3db5b028b504423b946d4ee5200a8f2f from qemu.
2018-02-09 09:31:17 -05:00
Richard Henderson
78378289e3
tcg: Move emit of INDEX_op_end into gen_tb_end
...
Backports commit 0a7df5da986bd7ee0789f2d7b8611f2e8eee5046 from qemu
2018-02-09 08:51:01 -05:00
Richard Henderson
6b4b493dae
tcg: Change tcg_global_mem_new_* to take a TCGv_ptr
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Thus, use cpu_env as the parameter, not TCG_AREG0 directly.
Update all uses in the translators.
Backports commit e1ccc05444676b92c63708096e36582be27fbee1 from qemu
2018-02-08 12:33:33 -05:00
Nguyen Anh Quynh
6ea39f7d5a
merge msvc with master
2017-02-24 10:39:36 +08:00
Nguyen Anh Quynh
e7ecbf7889
m68k: fix a compilation warning
2017-02-23 20:34:17 +08:00
xorstream
2695a0ffe8
M68K support added. ( #735 )
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* Fix for MIPS issue.
* Sparc support added.
* M68K support added.
2017-01-23 14:40:02 +08:00
xorstream
429bfca48e
Fixes for MSVC native support to still work with GCC/GNU.
2017-01-21 01:07:10 +11:00
Andrew Dutcher
97b10da133
Undo the disaster that was the patch to unicorn github issue #266 and fix it correctly. makes normal self-modifying code work.
2016-08-09 19:35:20 -07:00
Ryan Hileman
0886ae8ede
rework code/block tracing
2016-01-22 18:42:27 -08:00
Ryan Hileman
93052f6566
refactor to allow multiple hooks for one type
2016-01-22 18:41:43 -08:00
Nguyen Anh Quynh
b72671c6d5
sparc, arm, m68k: check for exit request after every hooked instruction
2015-12-20 12:28:15 +08:00
Nguyen Anh Quynh
886946dcf4
do not use syscall to quit emulation. this can fix issues #147 & #148
2015-09-26 16:49:00 +08:00
Nguyen Anh Quynh
a853eb6363
mips, m68k: early check to see if the address of BB is the until address
2015-09-22 10:24:26 +08:00
Jonathon Reinhart
3bd705a060
Merge remote-tracking branch 'upstream/master' into change-handle-based-api
2015-08-30 00:23:51 -04:00
Nguyen Anh Quynh
b335cf016c
do not generate basic-block callback when translation is broken in the middle due to full cache (all the remaining archs)
2015-08-27 21:09:00 +08:00
Jonathon Reinhart
8918deb1b2
change uch to uc_struct (target-m68k)
2015-08-26 09:02:16 -04:00
Nguyen Anh Quynh
344d016104
import
2015-08-21 15:04:50 +08:00
