905 commits

Author	SHA1	Message	Date
Jean-Christophe DUBOIS	0aa0b849c2	ARM: Factor out ARM on/off PSCI control functions ... Split ARM on/off function from PSCI support code. This will allow to reuse these functions in other code. Backports commit 825482adde1f971cbddf27e15fb4453ab3fae994 from qemu	2018-03-01 23:31:47 -05:00
Peter Maydell	468e2849cd	target/arm: Implement DBGVCR32_EL2 system register ... The DBGVCR_EL2 system register is needed to run a 32-bit EL1 guest under a Linux EL2 64-bit hypervisor. Its only purpose is to provide AArch64 with access to the state of the DBGVCR AArch32 register. Since we only have a dummy DBGVCR, implement a corresponding dummy DBGVCR32_EL2. Backports commit 4d2ec4da1c2d60c9fd8bad137506870c2f980410 from qemu	2018-03-01 23:02:28 -05:00
Peter Maydell	0db334c0e4	target/arm: Handle VIRQ and VFIQ in arm_cpu_do_interrupt_aarch32() ... To run a VM in 32-bit EL1 our AArch32 interrupt handling code needs to be able to cope with VIRQ and VFIQ exceptions. These behave like IRQ and FIQ except that we don't need to try to route them to Monitor mode. Backports commit 87a4b270348c69a446ebcddc039bfae31b1675cb from qemu	2018-03-01 22:59:08 -05:00
Lioncash	ebae552174	mips: Build fix	2018-03-01 22:56:23 -05:00
Thomas Huth	b2f1326437	Move target-* CPU file into a target/ folder ... We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Backports commit fcf5ef2ab52c621a4617ebbef36bf43b4003f4c0 from qemu	2018-03-01 22:50:58 -05:00