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unicorn/qemu/target/arm
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Peter Maydell 1afb240134 target/arm: Use correct ID register check for aa32_fp16_arith 
The aa32_fp16_arith feature check function currently looks at the
AArch64 ID_AA64PFR0 register. This is (as the comment notes) not
correct. The bogus check was put in mostly to allow testing of the
fp16 variants of the VCMLA instructions and it was something of
a mistake that we allowed them to exist in master.

Switch the feature check function to testing VMFR1.FPHP, which is
what it ought to be.

This will remove emulation of the VCMLA and VCADD insns from
AArch32 code running on an AArch64 '-cpu max' using system emulation.
(They were never enabled for aarch32 linux-user and system-emulation.)
Since we weren't advertising their existence via the AArch32 ID
register, well-behaved guests wouldn't have been using them anyway.

Once we have implemented all the AArch32 support for the FP16 extension
we will advertise it in the MVFR1 ID register field, which will reenable
these insns along with all the others.

Backports 02bc236d0131a666d4ac2bb7197bbad2897c336a
2021-02-27 16:47:48 -05:00
..
a32-uncond.decode target/arm: Convert Unallocated memory hint 2019-11-28 02:47:41 -05:00
a32.decode target/arm: Convert A32 coprocessor insns to decodetree 2021-02-26 10:57:00 -05:00
arm-powerctl.c arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on() 2020-01-07 18:10:29 -05:00
arm-powerctl.h ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2018-03-02 00:20:11 -05:00
cpu-param.h target/arm: Don't use a TLB for ARMMMUIdx_Stage2 2020-05-07 08:40:06 -04:00
cpu-qom.h target/arm: Make cpu_register() available for other files 2020-04-30 21:38:42 -04:00
cpu.c target/arm: Implement FPST_STD_F16 fpstatus 2021-02-26 12:00:25 -05:00
cpu.h target/arm: Use correct ID register check for aa32_fp16_arith 2021-02-27 16:47:48 -05:00
cpu64.c target/arm: Enable MTE 2021-02-25 23:00:27 -05:00
crypto_helper.c target/arm: Split helper_crypto_sm3tt 2020-06-14 23:24:21 -04:00
debug_helper.c target/arm: Stop assuming DBGDIDR always exists 2020-03-21 18:26:24 -04:00
helper-a64.c target/arm: Remove local definitions of float constants 2021-02-27 16:47:10 -05:00
helper-a64.h target/arm: Add helper_mte_check_zva 2021-02-25 17:17:54 -05:00
helper-sve.h target/arm: Merge helper_sve_clr_* and helper_sve_movz_* 2021-02-26 14:23:06 -05:00
helper.c target/arm: Clarify HCR_EL2 ARMCPRegInfo type 2021-02-26 12:18:15 -05:00
helper.h target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimd 2021-02-26 15:01:44 -05:00
internals.h target/arm: Always pass cacheattr to get_phys_addr 2021-02-25 22:46:00 -05:00
iwmmxt_helper.c target/arm: Untabify iwmmxt_helper.c 2018-08-25 04:33:44 -04:00
kvm-consts.h arm: better stub version for MISMATCH_CHECK 2018-03-02 00:13:45 -05:00
m-nocp.decode target/arm: Do M-profile NOCP checks early and via decodetree 2021-02-26 11:17:23 -05:00
m_helper.c target/arm: Always pass cacheattr to get_phys_addr 2021-02-25 22:46:00 -05:00
Makefile.objs target/arm: Do M-profile NOCP checks early and via decodetree 2021-02-26 11:17:23 -05:00
mte_helper.c target/arm: Fill in the WnR syndrome bit in mte_check_fail 2021-02-26 12:26:15 -05:00
neon-dp.decode target/arm: Convert Neon VTRN to decodetree 2021-02-25 13:12:28 -05:00
neon-ls.decode target/arm: Convert Neon 'load/store single structure' to decodetree 2020-05-07 09:32:17 -04:00
neon-shared.decode target/arm: Convert VFM[AS]L (scalar) to decodetree 2020-05-07 09:20:35 -04:00
neon_helper.c target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree 2020-05-15 23:26:51 -04:00
op_addsub.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
op_helper.c target/arm: Implement LDG, STG, ST2G instructions 2021-02-25 15:08:44 -05:00
pauth_helper.c target/arm: Fix AddPAC error indication 2021-02-25 23:44:28 -05:00
psci.c fix WFI/WFE length in syndrome register 2018-03-05 11:21:51 -05:00
sve.decode target/arm: Tidy SVE tszimm shift formats 2021-02-26 14:35:53 -05:00
sve_helper.c target/arm: Merge helper_sve_clr_* and helper_sve_movz_* 2021-02-26 14:23:06 -05:00
t16.decode target/arm: Convert T16, long branches 2019-11-28 02:53:54 -05:00
t32.decode target/arm: Convert T32 coprocessor insns to decodetree 2021-02-26 11:19:35 -05:00
tlb_helper.c target/arm: Cache the Tagged bit for a page in MemTxAttrs 2021-02-25 22:48:04 -05:00
translate-a64.c target/arm/translate-a64:Remove redundant statement in disas_simd_two_reg_misc_fp16() 2021-02-27 16:45:25 -05:00
translate-a64.h target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr() 2021-02-26 11:46:51 -05:00
translate-neon.inc.c target/arm: Use correct FPST for VCMLA, VCADD on fp16 2021-02-26 12:02:23 -05:00
translate-sve.c target/arm: Remove local definitions of float constants 2021-02-27 16:47:10 -05:00
translate-vfp.inc.c target/arm: Make A32/T32 use new fpstatus_ptr() API 2021-02-26 11:55:55 -05:00
translate.c target/arm: Make A32/T32 use new fpstatus_ptr() API 2021-02-26 11:55:55 -05:00
translate.h target/arm: Rearrange {sve,fp}_check_access assert 2021-02-26 13:56:27 -05:00
unicorn.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
unicorn_aarch64.c unicorn_aarch64: Use aa64_vfp_qreg instead of aa32_vfp_dreg 2018-09-03 07:47:40 +01:00
unicorn_arm.c arm/translate: Do not tracecode when in an IT block 2021-02-07 19:14:32 +00:00
vec_helper.c target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimd 2021-02-26 15:01:44 -05:00
vec_internal.h arm: Add missing file vec_internal.h 2020-06-20 00:12:09 +01:00
vfp-uncond.decode target/arm: Split VMINMAXNM decode 2020-03-22 00:09:53 -04:00
vfp.decode target/arm: Do M-profile NOCP checks early and via decodetree 2021-02-26 11:17:23 -05:00
vfp_helper.c target/arm: Remove local definitions of float constants 2021-02-27 16:47:10 -05:00