unicorn/qemu
Richard Henderson 2a4a7b9391
tcg: Use tlb_fill probe from tlb_vaddr_to_host
Most of the existing users would continue around a loop which
would fault the tlb entry in via a normal load/store.

But for AArch64 SVE we have an existing emulation bug wherein we
would mark the first element of a no-fault vector load as faulted
(within the FFR, not via exception) just because we did not have
its address in the TLB. Now we can properly only mark it as faulted
if there really is no valid, readable translation, while still not
raising an exception. (Note that beyond the first element of the
vector, the hardware may report a fault for any reason whatsoever;
with at least one element loaded, forward progress is guaranteed.)

Backports commit 4811e9095c0491bc6f5450e5012c9c4796b9e59d from qemu
2019-05-16 18:27:03 -04:00
..
accel tcg: Use tlb_fill probe from tlb_vaddr_to_host 2019-05-16 18:27:03 -04:00
crypto crypto: Clean up includes 2018-02-19 00:47:40 -05:00
default-configs target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
docs docs/devel/memory.txt: Document _with_attrs accessors 2018-10-04 04:46:26 -04:00
fpu qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
hw target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
include tcg: Use tlb_fill probe from tlb_vaddr_to_host 2019-05-16 18:27:03 -04:00
qapi qapi: Rewrite string-input-visitor's integer and list parsing 2018-12-18 04:57:25 -05:00
qobject qstring: Move qstring_from_substr()'s @end one to the right 2018-08-02 21:24:19 -04:00
qom tcg: Add CPUState cflags_next_tb 2019-05-04 22:30:22 -04:00
scripts decodetree: Add DisasContext argument to !function expanders 2019-05-09 17:40:45 -04:00
target tcg: Use tlb_fill probe from tlb_vaddr_to_host 2019-05-16 18:27:03 -04:00
tcg tcg: Synchronize with qemu 2019-05-16 18:11:08 -04:00
util util/cacheinfo: Use uint64_t on LLP64 model to satisfy Windows ARM64 2019-05-09 17:43:27 -04:00
aarch64.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
aarch64eb.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
accel.c clean-up: removed duplicate #includes 2018-02-28 08:51:56 -05:00
arm.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
armeb.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
CODING_STYLE
configure configure: automatically pick python3 is available 2019-05-03 11:36:36 -04:00
COPYING
COPYING.LIB
cpus.c Include qapi/error.h exactly where needed 2018-03-07 12:26:38 -05:00
exec.c exec.c: refactor function flatview_add_to_dispatch() 2019-03-11 17:00:46 -04:00
gen_all_header.sh
glib_compat.c target/arm/translate: Synchronize with Qemu 2019-04-27 10:13:01 -04:00
HACKING HACKING: document preference for g_new instead of g_malloc 2018-05-22 00:30:50 -04:00
header_gen.py tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
ioport.c hw: remove pio_addr_t 2018-02-24 02:43:16 -05:00
LICENSE
m68k.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
Makefile config-all-devices.mak: rebuild on reconfigure 2019-03-29 19:31:32 -04:00
Makefile.objs qapi: Move qapi-schema.json to qapi/, rename generated files 2018-03-09 11:35:11 -05:00
Makefile.target configure: Remove old -fno-gcse workaround for GCC 4.6.x and 4.7.[012] 2018-12-18 03:52:36 -05:00
memory.c cputlb: Synchronize with qemu 2019-04-26 15:48:45 -04:00
memory_ldst.inc.c exec: Fix MAP_RAM for cached access 2018-07-03 01:11:12 -04:00
memory_mapping.c include/qemu/osdep.h: Don't include qapi/error.h 2018-02-21 23:08:18 -05:00
mips.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
mips64.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
mips64el.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
mipsel.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
powerpc.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
qemu-timer.c timer/cpus: fix some typos and update some comments 2018-02-25 23:21:57 -05:00
riscv32.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
riscv64.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
rules.mak build-sys: silence make by default or V=0 2018-03-06 08:58:03 -05:00
sparc.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
sparc64.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
unicorn_common.h unicorn_common: Fix unicorn memory functions failing 2018-09-03 10:40:14 -04:00
VERSION Open 4.1 development tree 2019-04-24 11:59:00 -04:00
vl.c Use cpu_create(type) instead of cpu_init(cpu_model) 2018-03-20 14:20:30 -04:00
vl.h
x86_64.h tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00