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Alex Bennée 2f850606e9
arm/translate-a64: initial decode for simd_three_reg_same_fp16 
This is the initial decode skeleton for the Advanced SIMD three same
instruction group.

The fprintf is purely to aid debugging as the additional instructions
are added. It will be removed once the group is complete.

Backports commit 376e8d6cda985df31c8561db4b7ea365b6fe6f87 from qemu
2018-03-08 12:53:23 -05:00
..
accel tcg: Merge opcode arguments into TCGOp 2018-03-05 04:45:20 -05:00
crypto
default-configs
docs
fpu fpu/softfloat: re-factor sqrt 2018-03-08 12:23:54 -05:00
hw Include qapi/error.h exactly where needed 2018-03-07 12:26:38 -05:00
include include/exec/helper-head.h: support f16 in helper calls 2018-03-08 12:28:05 -05:00
qapi Include qapi/qmp/qlist.h exactly where needed 2018-03-08 08:50:06 -05:00
qobject Include qapi/qmp/qlist.h exactly where needed 2018-03-08 08:50:06 -05:00
qom Include qapi/qmp/qobject.h exactly where needed 2018-03-08 08:48:27 -05:00
scripts Include qapi/qmp/qdict.h exactly where needed 2018-03-08 08:51:46 -05:00
target arm/translate-a64: initial decode for simd_three_reg_same_fp16 2018-03-08 12:53:23 -05:00
tcg tcg/aarch64: Add vector operations 2018-03-07 08:07:58 -05:00
util oslib-posix: check for posix_memalign in configure script 2018-03-08 08:56:35 -05:00
aarch64.h arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV) 2018-03-08 12:49:30 -05:00
aarch64eb.h arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV) 2018-03-08 12:49:30 -05:00
accel.c
arm.h fpu/softfloat: re-factor sqrt 2018-03-08 12:23:54 -05:00
armeb.h fpu/softfloat: re-factor sqrt 2018-03-08 12:23:54 -05:00
atomic_template.h tcg: Record code_gen_buffer address for user-only memory helpers 2018-03-05 13:48:27 -05:00
CODING_STYLE
configure build-sys: check static linking of UBSAN 2018-03-08 09:00:31 -05:00
COPYING
COPYING.LIB
cpu-exec-common.c
cpu-exec.c exec-all: extract tb->tc_* into a separate struct tc_tb 2018-03-05 02:57:22 -05:00
cpus.c Include qapi/error.h exactly where needed 2018-03-07 12:26:38 -05:00
cputlb.c accel/tcg: add size paremeter in tlb_fill() 2018-03-06 10:56:34 -05:00
exec.c cpu: suffix cpu address spaces with cpu index 2018-03-05 14:41:25 -05:00
gen_all_header.sh
glib_compat.c
HACKING
header_gen.py arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV) 2018-03-08 12:49:30 -05:00
ioport.c
LICENSE
m68k.h fpu/softfloat: re-factor sqrt 2018-03-08 12:23:54 -05:00
Makefile Revert "build-sys: silence make by default or V=0" 2018-03-08 08:58:11 -05:00
Makefile.objs
Makefile.target tcg: Add generic vector expanders 2018-03-06 13:42:52 -05:00
memory.c memory: remove memory_region_test_and_clear_dirty 2018-03-08 09:02:06 -05:00
memory_ldst.inc.c
memory_mapping.c
mips.h fpu/softfloat: re-factor sqrt 2018-03-08 12:23:54 -05:00
mips64.h fpu/softfloat: re-factor sqrt 2018-03-08 12:23:54 -05:00
mips64el.h fpu/softfloat: re-factor sqrt 2018-03-08 12:23:54 -05:00
mipsel.h fpu/softfloat: re-factor sqrt 2018-03-08 12:23:54 -05:00
powerpc.h fpu/softfloat: re-factor sqrt 2018-03-08 12:23:54 -05:00
qapi-schema.json qapi: Update scripts to commit 01b2ffcedd94ad7b42bc870e4c6936c87ad03429 2018-03-03 18:32:12 -05:00
qemu-timer.c
rules.mak build-sys: silence make by default or V=0 2018-03-06 08:58:03 -05:00
softmmu_template.h accel/tcg: add size paremeter in tlb_fill() 2018-03-06 10:56:34 -05:00
sparc.h fpu/softfloat: re-factor sqrt 2018-03-08 12:23:54 -05:00
sparc64.h fpu/softfloat: re-factor sqrt 2018-03-08 12:23:54 -05:00
tcg-runtime-gvec.c tcg: Add generic vector helpers with a scalar operand 2018-03-06 16:10:09 -05:00
tcg-runtime.c exec-all: extract tb->tc_* into a separate struct tc_tb 2018-03-05 02:57:22 -05:00
translate-all.c translate-all: Zero out the TCGContext instance 2018-03-05 15:40:51 -05:00
translate-all.h
translate-common.c
unicorn_common.h
VERSION
vl.c Include qapi/error.h exactly where needed 2018-03-07 12:26:38 -05:00
vl.h
x86_64.h fpu/softfloat: re-factor sqrt 2018-03-08 12:23:54 -05:00