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unicorn/qemu/target-arm
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Peter Maydell 20712bcb9a
target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF 
The v8 ARM ARM defines that unused spaces in the ID_AA64* system
register ranges are Reserved and must RAZ, rather than being UNDEF.
Implement this.

In particular, ARM v8.2 adds a new feature register ID_AA64MMFR2,
and newer versions of the Linux kernel will attempt to read this,
which causes them not to boot up on versions of QEMU missing this fix.

Since the encoding .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 6
is actually defined in ARMv8 (as ID_MMFR4), we give it an entry in
the ARMCPU struct so CPUs can override it, though since none do
this too will just RAZ.

Backports commit e20d84c1407d43d5a2e2ac95dbb46db3b0af8f9f from qemu
2018-02-20 22:49:43 -05:00
..
arm_ldst.h import 2015-08-21 15:04:50 +08:00
cpu-qom.h target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF 2018-02-20 22:49:43 -05:00
cpu.c target-arm: Add the pmceid0 and pmceid1 registers 2018-02-20 15:22:41 -05:00
cpu.h target-arm: Fix handling of SDCR for 32-bit code 2018-02-20 22:26:58 -05:00
cpu64.c target-arm: Add the pmceid0 and pmceid1 registers 2018-02-20 15:22:41 -05:00
crypto_helper.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
helper-a64.c target-arm: Move aarch64_cpu_do_interrupt() to helper.c 2018-02-18 22:23:06 -05:00
helper-a64.h import 2015-08-21 15:04:50 +08:00
helper.c target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF 2018-02-20 22:49:43 -05:00
helper.h target-arm: Give CPSR setting on 32-bit exception return its own helper 2018-02-20 22:08:35 -05:00
internals.h target-arm: Move get/set_r13_banked() to op_helper.c 2018-02-20 15:09:07 -05:00
iwmmxt_helper.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
kvm-consts.h import 2015-08-21 15:04:50 +08:00
Makefile.objs delete sparc32_dma.h & arm-semi.c 2017-01-19 15:10:41 +08:00
neon_helper.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
op_addsub.h import 2015-08-21 15:04:50 +08:00
op_helper.c target-arm: Raw CPSR writes should skip checks and bank switching 2018-02-20 22:17:48 -05:00
psci.c import 2015-08-21 15:04:50 +08:00
translate-a64.c target-arm: Add isread parameter to CPAccessFns 2018-02-20 11:24:17 -05:00
translate.c target-arm: Give CPSR setting on 32-bit exception return its own helper 2018-02-20 22:08:35 -05:00
translate.h tcg: Remove gen_intermediate_code_pc 2018-02-17 15:23:59 -05:00
unicorn.h arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
unicorn_aarch64.c target-arm: Add write_type argument to cpsr_write() 2018-02-20 22:15:53 -05:00
unicorn_arm.c target-arm: Add write_type argument to cpsr_write() 2018-02-20 22:15:53 -05:00