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Dongjiu Geng 4dc3d59fd3
target/arm: change arch timer registers access permission 
Some generic arch timer registers are Config-RW in the EL0,
which means the EL0 exception level can have write permission
if it is appropriately configured.

When VM access registers, QEMU firstly checks whether they have RW
permission, then check whether it is appropriately configured.
If they are defined to read only in EL0, even though they have been
appropriately configured, they still do not have write permission.
So need to add the write permission according to ARMV8 spec when
define it.

Backports commit daf1dc5f82cefe2a57f184d5053e8b274ad2ba9a from qemu
2019-03-19 05:40:44 -04:00
..
accel cputlb: update TLB entry/index after tlb_fill 2019-02-12 11:48:48 -05:00
crypto crypto: Clean up includes 2018-02-19 00:47:40 -05:00
default-configs target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
docs docs/devel/memory.txt: Document _with_attrs accessors 2018-10-04 04:46:26 -04:00
fpu qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
hw target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
include qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
qapi qapi: Rewrite string-input-visitor's integer and list parsing 2018-12-18 04:57:25 -05:00
qobject qstring: Move qstring_from_substr()'s @end one to the right 2018-08-02 21:24:19 -04:00
qom qom/cpu: Add cluster_index to CPUState 2019-01-30 12:59:59 -05:00
scripts decodetree: Properly diagnose fields overflowing an insn 2019-03-13 11:21:04 -04:00
target target/arm: change arch timer registers access permission 2019-03-19 05:40:44 -04:00
tcg target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
util mmap-alloc: fix hugetlbfs misaligned length in ppc64 2019-02-05 16:52:39 -05:00
aarch64.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
aarch64eb.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
accel.c clean-up: removed duplicate #includes 2018-02-28 08:51:56 -05:00
arm.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
armeb.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
CODING_STYLE
configure configure: Disable W^X on OpenBSD 2019-03-11 16:46:52 -04:00
COPYING
COPYING.LIB
cpus.c Include qapi/error.h exactly where needed 2018-03-07 12:26:38 -05:00
exec.c exec.c: refactor function flatview_add_to_dispatch() 2019-03-11 17:00:46 -04:00
gen_all_header.sh arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
glib_compat.c target/arm: expose remaining CPUID registers as RAZ 2019-02-15 17:48:37 -05:00
HACKING HACKING: document preference for g_new instead of g_malloc 2018-05-22 00:30:50 -04:00
header_gen.py target/riscv: Convert quadrant 0 of RVXC insns to decodetree 2019-03-19 04:45:53 -04:00
ioport.c hw: remove pio_addr_t 2018-02-24 02:43:16 -05:00
LICENSE
m68k.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
Makefile Revert "Makefile: Rename TARGET_DIRS to TARGET_LIST" 2018-07-05 17:40:24 -04:00
Makefile.objs qapi: Move qapi-schema.json to qapi/, rename generated files 2018-03-09 11:35:11 -05:00
Makefile.target configure: Remove old -fno-gcse workaround for GCC 4.6.x and 4.7.[012] 2018-12-18 03:52:36 -05:00
memory.c memory: learn about non-volatile memory region 2018-11-11 08:50:39 -05:00
memory_ldst.inc.c exec: Fix MAP_RAM for cached access 2018-07-03 01:11:12 -04:00
memory_mapping.c include/qemu/osdep.h: Don't include qapi/error.h 2018-02-21 23:08:18 -05:00
mips.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
mips64.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
mips64el.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
mipsel.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
powerpc.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
qemu-timer.c timer/cpus: fix some typos and update some comments 2018-02-25 23:21:57 -05:00
riscv32.h target/riscv: Convert quadrant 0 of RVXC insns to decodetree 2019-03-19 04:45:53 -04:00
riscv64.h target/riscv: Convert quadrant 0 of RVXC insns to decodetree 2019-03-19 04:45:53 -04:00
rules.mak build-sys: silence make by default or V=0 2018-03-06 08:58:03 -05:00
sparc.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
sparc64.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
unicorn_common.h unicorn_common: Fix unicorn memory functions failing 2018-09-03 10:40:14 -04:00
VERSION Open 4.0 development tree 2018-12-11 20:33:45 -05:00
vl.c Use cpu_create(type) instead of cpu_init(cpu_model) 2018-03-20 14:20:30 -04:00
vl.h
x86_64.h qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00