Craig Janeczek 58dc377890 target/mips: Introduce MXU registers ... Define and initialize the 16 MXU registers - 15 general computational register, and 1 control register). There is also a zero register, but it does not have any corresponding variable. Backports commit eb5559f67dc8dc12335dd996877bb6daaea32eb2 from qemu.		2018-11-11 05:50:52 -05:00
..
cp0_timer.c
cpu-qom.h
cpu.c	target/mips/cpu: Use type_register instead of type_register_static() in mips_cpu_register_types()	2018-09-03 17:36:23 -04:00
cpu.h	target/mips: Introduce MXU registers	2018-11-11 05:50:52 -05:00
dsp_helper.c
helper.c	target/mips: Implement hardware page table walker for MIPS32	2018-10-23 14:29:27 -04:00
helper.h	target/mips: Add CP0 PWCtl register	2018-10-23 14:23:04 -04:00
internal.h	target/mips: Implement hardware page table walker for MIPS32	2018-10-23 14:29:27 -04:00
lmi_helper.c
Makefile.objs
mips-defs.h	target/mips: Define R5900 ISA, MMI ASE, and R5900 CPU preprocessor constants	2018-11-10 11:29:25 -05:00
msa_helper.c	target/mips: Remove floatX_maybe_silence_nan from conversions	2018-05-19 23:25:04 -04:00
op_helper.c	target/mips: Implement hardware page table walker for MIPS32	2018-10-23 14:29:27 -04:00
TODO
translate.c	target/mips: Introduce MXU registers	2018-11-11 05:50:52 -05:00
translate_init.c	target/mips: Define the R5900 CPU	2018-11-10 12:11:11 -05:00
unicorn.c	Use DEFINE_MACHINE() to register all machines	2018-03-11 15:12:46 -04:00
unicorn.h