unicorn/qemu/target/arm
Peter Maydell cdb9422f3a
target/arm: NS BusFault on vector table fetch escalates to NS HardFault
In the M-profile architecture, when we do a vector table fetch and it
fails, we need to report a HardFault. Whether this is a Secure HF or
a NonSecure HF depends on several things. If AIRCR.BFHFNMINS is 0
then HF is always Secure, because there is no NonSecure HardFault.
Otherwise, the answer depends on whether the 'underlying exception'
(MemManage, BusFault, SecureFault) targets Secure or NonSecure. (In
the pseudocode, this is handled in the Vector() function: the final
exc.isSecure is calculated by looking at the exc.isSecure from the
exception returned from the memory access, not the isSecure input
argument.)

We weren't doing this correctly, because we were looking at
the target security domain of the exception we were trying to
load the vector table entry for. This produces errors of two kinds:
* a load from the NS vector table which hits the "NS access
to S memory" SecureFault should end up as a Secure HardFault,
but we were raising an NS HardFault
* a load from the S vector table which causes a BusFault
should raise an NS HardFault if BFHFNMINS == 1 (because
in that case all BusFaults are NonSecure), but we were raising
a Secure HardFault

Correct the logic.

We also fix a comment error where we claimed that we might
be escalating MemManage to HardFault, and forgot about SecureFault.
(Vector loads can never hit MPU access faults, because they're
always aligned and always use the default address map.)

Backports commit 51c9122e92b776a3f16af0b9282f1dc5012e2a19 from qemu
2019-08-08 19:32:53 -04:00
..
arm-powerctl.c arm: Clarify the logic of set_pc() 2019-02-03 17:55:30 -05:00
arm-powerctl.h ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2018-03-02 00:20:11 -05:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 19:35:46 -04:00
cpu-qom.h target/arm: Add "-cpu max" support 2018-03-12 10:11:49 -04:00
cpu.c target/arm: Set VFP-related MVFR0 fields for arm926 and arm1026 2019-08-08 19:29:56 -04:00
cpu.h target/arm: Restrict semi-hosting to TCG 2019-08-08 17:48:34 -04:00
cpu64.c target/arm: Use env_cpu, env_archcpu 2019-06-12 11:34:08 -04:00
crypto_helper.c target/arm/cpu and crypto_helper: Correct bad merge and adjust to qemu code style 2018-03-12 11:57:24 -04:00
debug_helper.c target/arm: Move debug routines to debug_helper.c 2019-08-08 17:46:56 -04:00
helper-a64.c target/arm: Use env_cpu, env_archcpu 2019-06-12 11:34:08 -04:00
helper-a64.h target/arm: check CF_PARALLEL instead of parallel_cpus 2019-05-04 22:44:32 -04:00
helper-sve.h target/arm: Rewrite vector gather first-fault loads 2018-10-08 14:15:15 -04:00
helper.c target/arm: Fix sve_zcr_len_for_el 2019-08-08 19:20:35 -04:00
helper.h target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs 2019-05-16 16:43:02 -04:00
internals.h target/arm: Declare some M-profile functions publicly 2019-08-08 15:37:01 -04:00
iwmmxt_helper.c target/arm: Untabify iwmmxt_helper.c 2018-08-25 04:33:44 -04:00
kvm-consts.h arm: better stub version for MISMATCH_CHECK 2018-03-02 00:13:45 -05:00
m_helper.c target/arm: NS BusFault on vector table fetch escalates to NS HardFault 2019-08-08 19:32:53 -04:00
Makefile.objs target/arm/helper: Move M profile routines to m_helper.c 2019-08-08 18:04:08 -04:00
neon_helper.c target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs 2019-05-16 16:43:02 -04:00
op_addsub.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
op_helper.c target/arm: Move debug routines to debug_helper.c 2019-08-08 17:46:56 -04:00
pauth_helper.c target/arm: Fix output of PAuth Auth 2019-06-13 16:17:00 -04:00
psci.c fix WFI/WFE length in syndrome register 2018-03-05 11:21:51 -05:00
sve.decode target/arm: Sychronize with qemu 2019-04-18 04:49:11 -04:00
sve_helper.c tcg: Use tlb_fill probe from tlb_vaddr_to_host 2019-05-16 18:27:03 -04:00
tlb_helper.c target/arm: Move TLB related routines to tlb_helper.c 2019-08-08 15:24:26 -04:00
translate-a64.c target/arm: Move vfp_expand_imm() to translate.[ch] 2019-06-25 18:17:49 -05:00
translate-a64.h target/arm: Move vfp_expand_imm() to translate.[ch] 2019-06-25 18:17:49 -05:00
translate-sve.c tcg: Specify optional vector requirements with a list 2019-05-16 15:05:02 -04:00
translate-vfp.inc.c target/arm: Correct VMOV_imm_dp handling of short vectors 2019-08-08 18:08:55 -04:00
translate.c target/arm: Execute Thumb instructions when their condbits are 0xf 2019-08-08 18:07:57 -04:00
translate.h target/arm: Remove unused cpu_F0s, cpu_F0d, cpu_F1s, cpu_F1d 2019-06-25 18:45:53 -05:00
unicorn.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
unicorn_aarch64.c unicorn_aarch64: Use aa64_vfp_qreg instead of aa32_vfp_dreg 2018-09-03 07:47:40 +01:00
unicorn_arm.c unicorn_arm: Treat registers as unsigned values in casts 2019-04-26 08:48:31 -04:00
vec_helper.c target/arm: Add helpers for FMLAL 2019-02-28 15:31:48 -05:00
vfp-uncond.decode target/arm: Convert VCVTA/VCVTN/VCVTP/VCVTM to decodetree 2019-06-13 16:54:42 -04:00
vfp.decode target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_imm 2019-06-25 18:20:19 -05:00
vfp_helper.c target/arm/vfp_helper: Call set_fpscr_to_host before updating to FPSCR 2019-08-08 19:21:28 -04:00