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8d34a271f6
Tailchaining is an optimization in handling of exception return for M-profile cores: if we are about to pop the exception stack for an exception return, but there is a pending exception which is higher priority than the priority we are returning to, then instead of unstacking and then immediately taking the exception and stacking registers again, we can chain to the pending exception without unstacking and stacking. For v6M and v7M it is IMPDEF whether tailchaining happens for pending exceptions; for v8M this is architecturally required. Implement it in QEMU for all M-profile cores, since in practice v6M and v7M hardware implementations generally do have it. (We were already doing tailchaining for derived exceptions which happened during exception return, like the validity checks and stack access failures; these have always been required to be tailchained for all versions of the architecture.) Backports commit 5f62d3b9e67bfc3deb970e3c7fb7df7e57d46fc3 from qemu |
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arm-powerctl.c | ||
arm-powerctl.h | ||
arm_ldst.h | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
cpu64.c | ||
crypto_helper.c | ||
helper-a64.c | ||
helper-a64.h | ||
helper-sve.h | ||
helper.c | ||
helper.h | ||
internals.h | ||
iwmmxt_helper.c | ||
kvm-consts.h | ||
Makefile.objs | ||
neon_helper.c | ||
op_addsub.h | ||
op_helper.c | ||
psci.c | ||
sve.decode | ||
sve_helper.c | ||
translate-a64.c | ||
translate-a64.h | ||
translate-sve.c | ||
translate.c | ||
translate.h | ||
unicorn.h | ||
unicorn_aarch64.c | ||
unicorn_arm.c | ||
vec_helper.c |