unicorn/qemu/target/riscv
Zong Li 9792907bcf target/riscv: Change the TLB page size depends on PMP entries.
The minimum granularity of PMP is 4 bytes, it is small than 4KB page
size, therefore, the pmp checking would be ignored if its range doesn't
start from the alignment of one page. This patch detects the pmp entries
and sets the small page size to TLB if there is a PMP entry which cover
the page size.

Backports af3fc195e3c8e98b62eca3e4ee927f1965381dc3
2021-03-08 12:46:27 -05:00
..
insn_trans target/riscv: check before allocating TCG temps 2021-03-08 12:41:19 -05:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 19:35:46 -04:00
cpu.c target/riscv: Enable vector extensions 2021-03-08 11:18:36 -05:00
cpu.h target/riscv: fix vill bit index in vtype register 2021-03-08 12:13:58 -05:00
cpu_bits.h target/riscv: support vector extension csr 2021-02-26 02:25:58 -05:00
cpu_helper.c target/riscv: Change the TLB page size depends on PMP entries. 2021-03-08 12:46:27 -05:00
cpu_user.h Supply missing header guards 2019-06-12 10:59:10 -04:00
csr.c target/riscv: support vector extension csr 2021-02-26 02:25:58 -05:00
fpu_helper.c target/riscv: Check nanboxed inputs to fp helpers 2021-03-08 12:31:18 -05:00
helper.h target/riscv: vector compress instruction 2021-03-07 12:47:46 -05:00
insn16-32.decode target/riscv: Split RVC32 and RVC64 insns into separate files 2019-05-28 19:00:23 -04:00
insn16-64.decode target/riscv: Add checks for several RVC reserved operands 2019-05-28 19:20:36 -04:00
insn16.decode target/riscv: Add checks for several RVC reserved operands 2019-05-28 19:20:36 -04:00
insn32-64.decode target/riscv: add vector amo operations 2021-02-26 09:47:32 -05:00
insn32.decode target/riscv: vector compress instruction 2021-03-07 12:47:46 -05:00
instmap.h Supply missing header guards 2019-06-12 10:59:10 -04:00
internals.h target/riscv: Check nanboxed inputs to fp helpers 2021-03-08 12:31:18 -05:00
Makefile.objs target/riscv: add vector configure instruction 2021-02-26 02:37:59 -05:00
op_helper.c target/riscv: Implement checks for hfence 2021-02-25 12:03:57 -05:00
pmp.c target/riscv: Change the TLB page size depends on PMP entries. 2021-03-08 12:46:27 -05:00
pmp.h target/riscv: Change the TLB page size depends on PMP entries. 2021-03-08 12:46:27 -05:00
translate.c target/riscv: Check nanboxed inputs in trans_rvf.inc.c 2021-03-08 12:38:15 -05:00
unicorn.c target/riscv: Add the virtulisation mode 2020-03-22 01:15:06 -04:00
unicorn.h target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
vector_helper.c target/riscv/vector_helper: Fix build on 32-bit big endian hosts 2021-03-08 12:18:39 -05:00