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unicorn/qemu/target/arm
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Niek Linnenbank 998714db1f arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on() 
This change ensures that the FPU can be accessed in Non-Secure mode
when the CPU core is reset using the arm_set_cpu_on() function call.
The NSACR.{CP11,CP10} bits define the exception level required to
access the FPU in Non-Secure mode. Without these bits set, the CPU
will give an undefined exception trap on the first FPU access for the
secondary cores under Linux.

This is necessary because in this power-control codepath QEMU
is effectively emulating a bit of EL3 firmware, and has to set
the CPU up as the EL3 firmware would.

Fixes: fc1120a7f5

Backports commit 0c7f8c43daf6556078e51de98aa13f069e505985 from qemu
2020-01-07 18:10:29 -05:00
..
a32-uncond.decode target/arm: Convert Unallocated memory hint 2019-11-28 02:47:41 -05:00
a32.decode target/arm: Convert SVC 2019-11-28 02:46:55 -05:00
arm-powerctl.c arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on() 2020-01-07 18:10:29 -05:00
arm-powerctl.h ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2018-03-02 00:20:11 -05:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 19:35:46 -04:00
cpu-qom.h target/arm: Add "-cpu max" support 2018-03-12 10:11:49 -04:00
cpu.c target/arm: Add support for cortex-m7 CPU 2020-01-07 17:52:27 -05:00
cpu.h target/arm: Handle AArch32 CP15 trapping via HSTR_EL2 2020-01-07 18:07:21 -05:00
cpu64.c target/arm: generate a custom MIDR for -cpu max 2019-11-18 16:42:51 -05:00
crypto_helper.c target/arm/cpu and crypto_helper: Correct bad merge and adjust to qemu code style 2018-03-12 11:57:24 -04:00
debug_helper.c target/arm: Move debug routines to debug_helper.c 2019-08-08 17:46:56 -04:00
helper-a64.c target/arm: Use env_cpu, env_archcpu 2019-06-12 11:34:08 -04:00
helper-a64.h target/arm: check CF_PARALLEL instead of parallel_cpus 2019-05-04 22:44:32 -04:00
helper-sve.h target/arm: Rewrite vector gather first-fault loads 2018-10-08 14:15:15 -04:00
helper.c target/arm: Add support for missing Jazelle system registers 2020-01-07 18:09:13 -05:00
helper.h target/arm: Handle trapping to EL2 of AArch32 VMRS instructions 2020-01-07 18:04:16 -05:00
internals.h target/arm: Declare some M-profile functions publicly 2019-08-08 15:37:01 -04:00
iwmmxt_helper.c target/arm: Untabify iwmmxt_helper.c 2018-08-25 04:33:44 -04:00
kvm-consts.h arm: better stub version for MISMATCH_CHECK 2018-03-02 00:13:45 -05:00
m_helper.c target/arm: Fix handling of cortex-m FTYPE flag in EXCRET 2019-11-28 03:40:37 -05:00
Makefile.objs target/arm: Add skeleton for T16 decodetree 2019-11-28 02:50:27 -05:00
neon_helper.c target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs 2019-05-16 16:43:02 -04:00
op_addsub.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
op_helper.c target/arm: Handle AArch32 CP15 trapping via HSTR_EL2 2020-01-07 18:07:21 -05:00
pauth_helper.c target/arm: Fix output of PAuth Auth 2019-06-13 16:17:00 -04:00
psci.c fix WFI/WFE length in syndrome register 2018-03-05 11:21:51 -05:00
sve.decode target/arm: Sychronize with qemu 2019-04-18 04:49:11 -04:00
sve_helper.c tcg: Use tlb_fill probe from tlb_vaddr_to_host 2019-05-16 18:27:03 -04:00
t16.decode target/arm: Convert T16, long branches 2019-11-28 02:53:54 -05:00
t32.decode target/arm: Convert TT 2019-11-28 02:48:06 -05:00
tlb_helper.c target/arm: Move TLB related routines to tlb_helper.c 2019-08-08 15:24:26 -04:00
translate-a64.c target/arm: Amend bad merge 2019-11-28 03:29:56 -05:00
translate-a64.h tcg: TCGMemOp is now accelerator independent MemOp 2019-11-28 03:01:12 -05:00
translate-sve.c tcg: TCGMemOp is now accelerator independent MemOp 2019-11-28 03:01:12 -05:00
translate-vfp.inc.c target/arm: Handle trapping to EL2 of AArch32 VMRS instructions 2020-01-07 18:04:16 -05:00
translate.c target/arm: Handle AArch32 CP15 trapping via HSTR_EL2 2020-01-07 18:07:21 -05:00
translate.h target/arm: Handle AArch32 CP15 trapping via HSTR_EL2 2020-01-07 18:07:21 -05:00
unicorn.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
unicorn_aarch64.c unicorn_aarch64: Use aa64_vfp_qreg instead of aa32_vfp_dreg 2018-09-03 07:47:40 +01:00
unicorn_arm.c unicorn_arm: Treat registers as unsigned values in casts 2019-04-26 08:48:31 -04:00
vec_helper.c target/arm: Add helpers for FMLAL 2019-02-28 15:31:48 -05:00
vfp-uncond.decode target/arm: Convert VCVTA/VCVTN/VCVTP/VCVTM to decodetree 2019-06-13 16:54:42 -04:00
vfp.decode target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_imm 2019-06-25 18:20:19 -05:00
vfp_helper.c target/arm: Handle trapping to EL2 of AArch32 VMRS instructions 2020-01-07 18:04:16 -05:00