..
default-configs
arm64eb: add support for ARM64 big endian.
2017-04-24 23:30:01 +08:00
docs
docs: clarify memory region lifecycle
2018-02-12 15:11:21 -05:00
fpu
softfloat: expand out STATUS macro
2018-02-12 13:43:13 -05:00
hw
target-i386: disable LINT0 after reset
2018-02-12 21:07:36 -05:00
include
target-i386: introduce cpu_get_mem_attrs
2018-02-13 11:33:39 -05:00
qapi
This code should now build the x86_x64-softmmu part 2.
2017-01-19 22:50:28 +11:00
qobject
This code should now build the x86_x64-softmmu part 2.
2017-01-19 22:50:28 +11:00
qom
qom: Fix object_property_add_alias() with [*]
2018-02-12 16:33:58 -05:00
scripts
Save copies of generated qapi files.
2017-01-21 00:30:50 +11:00
target-arm
target-arm/cpu.h: remove pending_exception
2018-02-13 14:24:08 -05:00
target-i386
target-i386: create a separate AddressSpace for each CPU
2018-02-13 12:36:26 -05:00
target-m68k
unicorn_arm: m68k/translate: Build fixes
2018-02-13 09:15:46 -05:00
target-mips
target-mips: enable XPA and LPA features
2018-02-13 14:14:59 -05:00
target-sparc
target-*: Increment num_insns immediately after tcg_gen_insn_start
2018-02-11 12:46:30 -05:00
tcg
tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITS
2018-02-13 08:28:29 -05:00
util
bitmap: add atomic test and clear
2018-02-13 10:02:12 -05:00
aarch64.h
target-mips: Misaligned memory accesses for MSA
2018-02-13 13:27:31 -05:00
aarch64eb.h
target-mips: Misaligned memory accesses for MSA
2018-02-13 13:27:31 -05:00
accel.c
Automated leading tab to spaces conversion.
2017-01-21 12:28:22 +11:00
arm.h
target-mips: Misaligned memory accesses for MSA
2018-02-13 13:27:31 -05:00
armeb.h
target-mips: Misaligned memory accesses for MSA
2018-02-13 13:27:31 -05:00
CODING_STYLE
import
2015-08-21 15:04:50 +08:00
configure
tcg: Drop ia64 host support
2018-02-04 18:33:02 -05:00
COPYING
import
2015-08-21 15:04:50 +08:00
COPYING.LIB
import
2015-08-21 15:04:50 +08:00
cpu-exec.c
exec: make iotlb RCU-friendly
2018-02-12 15:20:39 -05:00
cpus.c
cleanup more synchronization code
2017-01-09 14:05:39 +08:00
cputlb.c
memory: replace cpu_physical_memory_reset_dirty() with test-and-clear
2018-02-13 11:25:45 -05:00
exec.c
memory: replace cpu_physical_memory_reset_dirty() with test-and-clear
2018-02-13 11:25:45 -05:00
gen_all_header.sh
arm64eb: add support for ARM64 big endian.
2017-04-24 23:30:01 +08:00
glib_compat.c
Merge branch 'master' into msvc2
2017-04-21 01:17:00 +08:00
HACKING
import
2015-08-21 15:04:50 +08:00
header_gen.py
target-mips: add ERETNC instruction and Config5.LLB bit
2018-02-13 13:33:37 -05:00
ioport.c
memory: Define API for MemoryRegionOps to take attrs and return status
2018-02-12 17:17:27 -05:00
LICENSE
import
2015-08-21 15:04:50 +08:00
m68k.h
target-mips: Misaligned memory accesses for MSA
2018-02-13 13:27:31 -05:00
Makefile
cleanup qemu/default-configs/
2017-01-19 14:52:30 +08:00
Makefile.objs
cleanup qemu/Makefile.objs
2017-01-21 21:50:12 +08:00
Makefile.target
tcg: Move some opcode generation functions out of line
2018-02-09 08:10:00 -05:00
memory.c
memory: use mr->ram_addr in "is this RAM?" assertions
2018-02-13 11:31:02 -05:00
memory_mapping.c
revert to use of g_free to make future qemu integrations easier ( #695 )
2016-12-21 22:28:36 +08:00
mips.h
target-mips: add ERETNC instruction and Config5.LLB bit
2018-02-13 13:33:37 -05:00
mips64.h
target-mips: add ERETNC instruction and Config5.LLB bit
2018-02-13 13:33:37 -05:00
mips64el.h
target-mips: add ERETNC instruction and Config5.LLB bit
2018-02-13 13:33:37 -05:00
mipsel.h
target-mips: add ERETNC instruction and Config5.LLB bit
2018-02-13 13:33:37 -05:00
powerpc.h
target-mips: Misaligned memory accesses for MSA
2018-02-13 13:27:31 -05:00
qapi-schema.json
import
2015-08-21 15:04:50 +08:00
qemu-log.c
import
2015-08-21 15:04:50 +08:00
qemu-timer.c
timer is redundant
2017-01-20 16:46:58 +08:00
rules.mak
import
2015-08-21 15:04:50 +08:00
softmmu_template.h
Add MemTxAttrs to the IOTLB
2018-02-12 18:38:38 -05:00
sparc.h
target-mips: Misaligned memory accesses for MSA
2018-02-13 13:27:31 -05:00
sparc64.h
target-mips: Misaligned memory accesses for MSA
2018-02-13 13:27:31 -05:00
tcg-runtime.c
platform.h move #3
2017-01-21 00:13:21 +11:00
translate-all.c
translate-all: make less of tb_invalidate_phys_page_range depend on is_cpu_write_access
2018-02-13 09:18:49 -05:00
translate-all.h
translate-all: remove unnecessary argument to tb_invalidate_phys_range
2018-02-13 09:04:51 -05:00
unicorn_common.h
This code should now build the x86_x64-softmmu part 2.
2017-01-19 22:50:28 +11:00
VERSION
import
2015-08-21 15:04:50 +08:00
vl.c
This code should now build the x86_x64-softmmu part 2.
2017-01-19 22:50:28 +11:00
vl.h
import
2015-08-21 15:04:50 +08:00
x86_64.h
target-mips: Misaligned memory accesses for MSA
2018-02-13 13:27:31 -05:00
f6d104b33a