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363 commits

Author SHA1 Message Date
Ryan Hileman 1b00d3f89a remove slow cpu QOM casts (#815) 2017-05-02 14:56:39 +08:00
Nguyen Anh Quynh c01dcf0a14 fix merge conflicts 2017-03-10 21:04:33 +08:00
Ahmed Samy 02e6c14e12 x86: add MSR API via reg API (#755) 
Writing / reading to model specific registers should be as easy as
calling a function, it's a bit stupid to write shell code and run them
just to write/read to a MSR, and even worse, you need more than just a
shellcode to read...

So, add a special register ID called UC_X86_REG_MSR, which should be
passed to uc_reg_write()/uc_reg_read() as the register ID, and then a
data structure which is uc_x86_msr (12 bytes), as the value (always), where:
	Byte	Value		Size
	0	MSR ID		4
	4       MSR val		8
 2017-02-24 21:37:19 +08:00
Nguyen Anh Quynh 6ea39f7d5a merge msvc with master 2017-02-24 10:39:36 +08:00
Chris Eagle a03e908611 Fix initial state of segment registers (#751) 
* Remove glib from samples makefile

* changes to 16 bit segment registers needs to update segment base as well as segment selector

* change how x86 segment registers are set in 16-bit mode

* more appropriate solution to initial state of x86 segment registers in 16-bit mode

* remove commented lines
 2017-02-09 23:49:54 +08:00
Chris Eagle f05984961b Fix 16-bit address computations (#747) 
* Remove glib from samples makefile

* changes to 16 bit segment registers needs to update segment base as well as segment selector

* change how x86 segment registers are set in 16-bit mode
 2017-02-08 09:37:41 +08:00
Nguyen Anh Quynh 0680b85920 cleanup Monitor related code 2017-01-23 10:07:01 +08:00
Nguyen Anh Quynh 55d472c62c cleanup Monitor related code 2017-01-23 00:53:31 +08:00
xorstream e46f86c80b Merging with current msvc. 2017-01-23 01:07:06 +11:00
xorstream 72a497bc14 Added MIPS support and projects for all samples. 2017-01-23 01:05:08 +11:00
Nguyen Anh Quynh 206819bd98 cleanup after msvc port 2017-01-22 21:27:17 +08:00
xorstream 770c5616e2 Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
xorstream df41c49e2d Fixed warning about {} initialisers. 2017-01-21 11:41:11 +11:00
xorstream 429bfca48e Fixes for MSVC native support to still work with GCC/GNU. 2017-01-21 01:07:10 +11:00
xorstream fac6a66860 platform.h move #3 2017-01-21 00:13:21 +11:00
xorstream b0ae2138fb Merge remote-tracking branch 'unicorn-engine/master' into msvc_native 2017-01-20 22:37:51 +11:00
Nguyen Anh Quynh 42771848d6 no more spinlock 2017-01-20 14:57:33 +08:00
xorstream 002151874a Unicorn interface working with test app in 32bit and 64bit builds. 2017-01-20 17:27:22 +11:00
xorstream 1aeaf5c40d This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
Nguyen Anh Quynh 7512ff57de more cleanup 2017-01-10 16:29:47 +08:00
Chris Eagle fccbcfd4c2 revert to use of g_free to make future qemu integrations easier (#695) 
* revert to use of g_free to make future qemu integrations easier

* bracing
 2016-12-21 22:28:36 +08:00
Chris Eagle e46545f722 remove glib dependency by provide compatible replacements 2016-12-18 14:56:58 -08:00
Nguyen Anh Quynh e1b65a6edb cleanup unused code 2016-11-19 23:48:23 +08:00
Nguyen Anh Quynh b7cdbe7a88 Merge branch 'feat/reg_save_restore' of https://github.com/rhelmot/unicorn into rhelmot-feat/reg_save_restore 2016-10-07 09:57:07 +08:00
Ryan Hileman cb615fdba7 remove uc->cpus 2016-09-23 07:38:21 -07:00
Nguyen Anh Quynh 69d976375e Merge branch 'fix/self_modifying' of https://github.com/rhelmot/unicorn into rhelmot-fix/self_modifying 2016-08-30 21:20:22 +08:00
Nguyen Anh Quynh 89c9ea5f8f Merge branch 'fix/eflags' of https://github.com/rhelmot/unicorn into rhelmot-fix/eflags 2016-08-24 16:13:31 +08:00
Andrew Dutcher 0ef2b5fd71 New feature: registers can be bulk saved/restored in an opaque blob 2016-08-20 04:14:07 -07:00
Andrew Dutcher 3a1f231e8f eflags patch 2016-08-09 19:38:44 -07:00
Andrew Dutcher 97b10da133 Undo the disaster that was the patch to unicorn github issue #266 and fix it correctly. makes normal self-modifying code work. 2016-08-09 19:35:20 -07:00
Andrew Dutcher 4a8f52ae7f support xmm registers 2016-08-09 19:34:34 -07:00
Nguyen Anh Quynh cc6cbc5cf7 Merge branch 'memleak' into m2 2016-04-18 12:48:13 +08:00
Nguyen Anh Quynh 721f17eb74 Merge branch 'batch_reg' of https://github.com/lunixbochs/unicorn into lunixbochs-batch_reg 2016-04-06 09:39:22 +08:00
Nguyen Anh Quynh 70da2485fc x86: comment out restore_eflags() because it breaks some executions. see #505 2016-04-06 09:36:06 +08:00
Ryan Hileman acd88856e1 add batched reg access 2016-04-04 20:51:38 -07:00
Ryan Hileman 66619fc6cd remove call to restore_eflags (#496) 2016-04-03 23:08:17 -07:00
Chris Eagle 4c4203cec8 fix x86 segment setup by updating cached segment registers on reg_write 2016-03-22 23:54:30 -07:00
Nguyen Anh Quynh 859111f8f5 x86: return immediately after handling FPSW/FPCW/FPTAG registers 2016-03-20 18:15:41 +08:00
Nguyen Anh Quynh fb1ebac000 Merge branch 'master' into m1 2016-03-09 15:13:42 +08:00
Hiroyuki UEKAWA c5888e5670 move macros in qemu/target-*/unicorn*.c to uc_priv.h 2016-03-02 12:43:02 +09:00
Hiroyuki UEKAWA 1cd3c3093b fix WRITE_BYTE_H 2016-03-02 10:51:50 +09:00
Jonas Zaddach 5fa6705d7a Fixed restoring of eflags after helper call 2016-02-29 22:57:41 +01:00
Nguyen Anh Quynh b69feb8d0b Merge branch 'master' into memleak2 2016-02-15 15:52:10 +08:00
Nguyen Anh Quynh 3bd7fa4bfe chmod -x qemu/target-i386/unicorn.c 2016-02-12 13:48:58 +08:00
Nguyen Anh Quynh 6478a24404 Merge branch 'gdt_idt' of https://github.com/cseagle/unicorn into cseagle-gdt_idt 2016-02-06 17:31:42 +08:00
Chris Eagle dec3615d12 ldtr and tr limit is 20 bits, not 16 bits 2016-02-04 19:26:47 -08:00
Chris Eagle b49358524f fix reg_read casting for x86 segment registers 2016-02-04 19:22:39 -08:00
Chris Eagle 4cb43be5bf fix reg_read casting for x86 segment registers 2016-02-04 19:20:59 -08:00
Chris Eagle 49b9f4f8da uc_x86_mmr type available in qemu/target-i386/unicorn.c 2016-02-04 19:09:41 -08:00
Chris Eagle c339ced218 file perms 2016-02-04 17:18:24 -08:00
Chris Eagle f3dc2522a0 read/write of x86 segment registers should modify selector field not base field 2016-02-04 17:17:40 -08:00
Chris Eagle 59f7bf3be7 file perms 2016-02-04 16:48:27 -08:00
Chris Eagle e59382e030 updated gdtr/idtr/ldtr/tr read/write code 2016-02-04 16:44:52 -08:00
Chris Eagle 9977054a15 add support for setting gdtr, idtr, ldtr, and tr programatically 2016-02-03 09:22:29 -08:00
Nguyen Anh Quynh 20b01a6933 fix merge conflict 2016-02-01 12:08:38 +08:00
Nguyen Anh Quynh 5a04bcb115 allow to change PC during callback. this solves issue #210 2016-01-28 14:06:17 +08:00
Nguyen Anh Quynh 2341f5dd1a code style 2016-01-26 17:37:48 +08:00
Ryan Hileman 0886ae8ede rework code/block tracing 2016-01-22 18:42:27 -08:00
Ryan Hileman 93052f6566 refactor to allow multiple hooks for one type 2016-01-22 18:41:43 -08:00
Nguyen Anh Quynh 7695fb1578 x86: no need to reset env->invalid_error in x86_reg_reset() as we always do that in cpu_exec() 2016-01-12 01:01:11 +08:00
Nguyen Anh Quynh a0aa26d6ee c89 2016-01-10 23:34:36 +08:00
Nguyen Anh Quynh 075ccadbe9 x86: set s->pc in disas_insn() early to fix uninitialized read issue. bug reported by @farmdve 2016-01-03 08:25:51 +07:00
Nguyen Anh Quynh f10d79e95f x86: fix a compilation warning on unused variable 2015-12-28 13:06:25 +08:00
Spl3en bb375e4fa9 Reset correctly the register CR0 in protected mode by calling cpu_x86_update_cr0 instead of setting it manually. 2015-12-25 04:55:15 +01:00
Spl3en 9ca993d8aa Restore the protected mode check. 2015-12-24 18:39:19 +01:00
Spl3en 4c3ad139ea (Fix #341) SYSENTER instruction is not properly hooked with uc_hook_add in x86 emulation. 
helper_sysenter in qemu/target-i386/seg_helper.c didn't check properly if a call interrupt callback was registred.
It has been fixed by copying the helper_syscall behavior.
 2015-12-24 16:00:22 +01:00
Nguyen Anh Quynh ed319bda0b x86: identity map guest address to host address. this fixes issue #300 2015-12-24 09:51:17 +08:00
farmdve 65a649dec0 Fix issue #269 
Patch from here
http://lists.nongnu.org/archive/html/qemu-devel/2015-11/msg03848.html

Also fix another potential issue with constants from
bbeb82395e (diff-9e0011b4d4a5890b309421630e6d86c3)
 2015-11-17 18:34:38 +02:00
Nguyen Anh Quynh edaea7020b x86: on self-modifying code, generate JIT code until end of block. this fixes issue #266 2015-11-16 21:55:42 +08:00
farmdve 1ba39a582c change tabs to whitespaces... 2015-11-13 16:53:01 +02:00
farmdve 661714d0c2 Potential fix for issue #262/#263 2015-11-13 16:51:59 +02:00
Nguyen Anh Quynh 2f297bdd3a handle some errors properly so avoid exit() during initialization. this fixes issue #237 2015-11-12 01:43:41 +08:00
Nguyen Anh Quynh 938d0b89eb x86: check for exit request after every hooked instruction. this should fix issue #232 2015-11-07 01:02:45 +08:00
Nguyen Anh Quynh 51323c9c17 x86: properly calculate EFLAGS when UC_HOOK_CODE is used. this should fix issue #246 2015-11-05 20:26:39 +08:00
Ryan Hileman 8c60d0dca5 allow setting x86 segment base to host-sized value 2015-10-23 00:15:08 -07:00
feliam b43f89566f Bugfix 2016-03-15 12:17:40 -03:00
Nguyen Anh Quynh 75e5fb466c x86: fix writing to UC_X86_REG_FPCW 2016-03-14 09:27:46 +08:00
feliam 23b3f651f9 Indentation 2016-03-10 07:45:36 -03:00
feliam 0a3799eada FPU control word and tags 2016-03-09 19:14:33 -03:00
feliam ff66a72d7b GDT/LDT/IDT/FPU access from python bingings 2016-03-09 18:07:38 -03:00
Nguyen Anh Quynh 886946dcf4 do not use syscall to quit emulation. this can fix issues #147 & #148 2015-09-26 16:49:00 +08:00
Nguyen Anh Quynh 9e4ed32e8a x86: handle SYSCALL even if there is no handler 2015-09-07 10:19:45 +08:00
Nguyen Anh Quynh a166c24f8e x86: correct EIP of INT instruction by updating it only after calling interrupt handler 2015-09-06 14:58:11 +08:00
Nguyen Anh Quynh 84e3b5c897 cast all the values to write to registers in uc_reg_write() to unsigned type. this fixes issue #98 2015-09-04 11:17:08 +08:00
Jonathon Reinhart bd0a6921cc Merge remote-tracking branch 'upstream/master' into change-handle-based-api 2015-09-02 21:04:43 -04:00
Nguyen Anh Quynh a94e31165d x86: fix issue #95 2015-09-02 12:00:43 +08:00
Ryan Hileman db8f499fe9 fix crash on some SSE instructions 2015-09-01 19:12:51 -07:00
Jonathon Reinhart 2c802a3e4b Merge remote-tracking branch 'upstream/master' into change-handle-based-api 
# Conflicts:
#	qemu/target-i386/unicorn.c
 2015-09-01 13:17:03 -04:00
Nguyen Anh Quynh 90fc201f8d x86: enable bunch of instructions via CPUID. this fixes issue #91 2015-09-02 00:16:45 +08:00
mothran 6aa2b73bea removed ifdef for x64 in fpu saving 2015-08-30 19:39:46 -07:00
mothran e1ab761e8a fixed typo 2015-08-30 19:32:39 -07:00
mothran 2b6f806759 removed testing printf 2015-08-30 19:22:41 -07:00
mothran 4cd5fa3811 fpip x64 fxsave working with using hflags to check CPU mode 2015-08-30 18:56:55 -07:00
mothran 912faf2c3c after closer review, in x64 the the op size is 32 so data32 is set, can removed the unicorn dependency and regress/fpu_ip64.py still works 2015-08-30 18:04:28 -07:00
Jonathon Reinhart 3bd705a060 Merge remote-tracking branch 'upstream/master' into change-handle-based-api 2015-08-30 00:23:51 -04:00
mothran b7d60313b5 added 64 bit mode to the fstenv helper function, also a fpu_ip64.py regress script 2015-08-29 01:56:36 -07:00
mothran 79184ff23d Merge branch 'master' of github.com:unicorn-engine/unicorn into fpip_update 2015-08-28 23:40:25 -07:00
mothran feb8ced027 fixed the FPIP updates to correctly only work with non-control instructions and make sure the pc addr is correct 2015-08-28 10:39:11 -07:00
mothran 933ef379b4 restricted fpip updates to only non-control instructions 2015-08-28 03:19:10 -07:00
Nguyen Anh Quynh 4a1c5ff071 x86: verify until address early when translating block in frontend. this should fix issue #63 2015-08-28 16:06:06 +08:00
mothran 59b09a71bf first shot at getting FPIP working, need to remove all FP control instructions from being updated 2015-08-27 21:54:23 -07:00
Jonathon Reinhart b57662e43d change uch to uc_struct (target-i386) 2015-08-26 09:02:16 -04:00
Nguyen Anh Quynh 2fac7fc2e4 x86: better support for 16bit mode 2015-08-26 00:39:46 +08:00
Nguyen Anh Quynh c3e95ec34e x86: do not generate basic-block callback when translation is broken in the middle due to full cache 2015-08-25 14:50:55 +08:00
Jonathon Reinhart 9163bba812 restore mode of .[ch] files 
These were marked as executable in 5c3b6819, likely due to a Windows
filesystem being involved. This can be avoided:
http://stackoverflow.com/q/1580596/119527
 2015-08-24 21:19:12 -04:00
Chris Eagle 5c3b681945 Add const to uc_reg_write and derivitives 2015-08-24 09:42:50 -07:00
Nguyen Anh Quynh 9d9c0d1a25 uc_emu_start() report error on illegal instruction at the output 2015-08-25 00:02:31 +08:00
mothran a167f7c456 renames the register constants so unicorn and capstone can compile together 2015-08-23 21:36:33 -07:00
Nguyen Anh Quynh 7ca9a07e1b x86: enable SSE. this fixes issue #3 2015-08-23 10:41:14 +08:00
Nguyen Anh Quynh 4701fb80b4 code style: convert tabs to spaces 2015-08-23 09:06:31 +08:00
Nguyen Anh Quynh e1baf2f36b x86: support hooking SYSCALL/SYSENTER instructions. we no longer share the SYSCALL callback with interrupt instructions 2015-08-23 01:19:40 +08:00
Ryan Hileman 0ac3cf99d4 call int80 callback from x86_64 syscall helper 2015-08-21 16:26:02 -07:00
Nguyen Anh Quynh 344d016104 import 2015-08-21 15:04:50 +08:00