unicorn/qemu/target/arm
Peter Maydell 1c6b0339e6 target/arm: Allow user-mode code to write CPSR.E via MSR
Using the MSR instruction to write to CPSR.E is deprecated, but it is
required to work from any mode including unprivileged code. We were
incorrectly forbidding usermode code from writing it because
CPSR_USER did not include the CPSR_E bit.

We use CPSR_USER in only three places:
* as the mask of what to allow userspace MSR to write to CPSR
* when deciding what bits a linux-user signal-return should be
able to write from the sigcontext structure
* in target_user_copy_regs() when we set up the initial
registers for the linux-user process

In the first two cases not being able to update CPSR.E is a bug, and
in the third case it doesn't matter because CPSR.E is always 0 there.
So we can fix both bugs by adding CPSR_E to CPSR_USER.

Because the cpsr_write() in restore_sigcontext() is now changing
a CPSR bit which is cached in hflags, we need to add an
arm_rebuild_hflags() call there; the callsite in
target_user_copy_regs() was already rebuilding hflags for other
reasons.

(The recommended way to change CPSR.E is to use the 'SETEND'
instruction, which we do correctly allow from usermode code.)

Backports commit 268b1b3dfbb92a9348406f728a33f39e3d8dcd8a from qemu
2020-06-14 21:08:03 -04:00
..
a32-uncond.decode target/arm: Convert Unallocated memory hint 2019-11-28 02:47:41 -05:00
a32.decode target/arm: Convert SVC 2019-11-28 02:46:55 -05:00
arm-powerctl.c arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on() 2020-01-07 18:10:29 -05:00
arm-powerctl.h ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2018-03-02 00:20:11 -05:00
cpu-param.h target/arm: Don't use a TLB for ARMMMUIdx_Stage2 2020-05-07 08:40:06 -04:00
cpu-qom.h target/arm: Make cpu_register() available for other files 2020-04-30 21:38:42 -04:00
cpu.c target/arm: Make set_feature() available for other files 2020-05-11 17:02:21 -04:00
cpu.h target/arm: Allow user-mode code to write CPSR.E via MSR 2020-06-14 21:08:03 -04:00
cpu64.c arm/cpu64: Remove unused variable 2020-05-11 17:18:13 -04:00
crypto_helper.c target/arm/cpu and crypto_helper: Correct bad merge and adjust to qemu code style 2018-03-12 11:57:24 -04:00
debug_helper.c target/arm: Stop assuming DBGDIDR always exists 2020-03-21 18:26:24 -04:00
helper-a64.c target/arm: Move helper_dc_zva to helper-a64.c 2020-04-30 06:12:26 -04:00
helper-a64.h target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva 2020-04-30 06:14:45 -04:00
helper-sve.h target/arm: Use tcg_gen_gvec_5_ptr for sve FMLA/FCMLA 2020-05-11 17:17:17 -04:00
helper.c softfloat: Use post test for floatN_mul 2020-05-21 17:24:00 -04:00
helper.h target/arm: Move 'env' argument of recps_f32 and rsqrts_f32 helpers to usual place 2020-05-15 23:41:37 -04:00
internals.h target/arm: Introduce core_to_aa64_mmu_idx 2020-04-30 05:58:59 -04:00
iwmmxt_helper.c target/arm: Untabify iwmmxt_helper.c 2018-08-25 04:33:44 -04:00
kvm-consts.h arm: better stub version for MISMATCH_CHECK 2018-03-02 00:13:45 -05:00
m_helper.c target/arm: Add isar_feature_aa32_vfp_simd 2020-03-21 23:11:36 -04:00
Makefile.objs target/arm: Add stubs for AArch32 Neon decodetree 2020-05-07 08:59:42 -04:00
neon-dp.decode target/arm: Convert NEON VFMA, VFMS 3-reg-same insns to decodetree 2020-05-15 23:49:20 -04:00
neon-ls.decode target/arm: Convert Neon 'load/store single structure' to decodetree 2020-05-07 09:32:17 -04:00
neon-shared.decode target/arm: Convert VFM[AS]L (scalar) to decodetree 2020-05-07 09:20:35 -04:00
neon_helper.c target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree 2020-05-15 23:26:51 -04:00
op_addsub.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
op_helper.c target/arm: Move helper_dc_zva to helper-a64.c 2020-04-30 06:12:26 -04:00
pauth_helper.c target/arm: Use bit 55 explicitly for pauth 2020-03-21 17:59:06 -04:00
psci.c fix WFI/WFE length in syndrome register 2018-03-05 11:21:51 -05:00
sve.decode target/arm: Sychronize with qemu 2019-04-18 04:49:11 -04:00
sve_helper.c softfloat: Replace flag with bool 2020-05-21 17:48:12 -04:00
t16.decode target/arm: Convert T16, long branches 2019-11-28 02:53:54 -05:00
t32.decode target/arm: Convert TT 2019-11-28 02:48:06 -05:00
tlb_helper.c target/arm: Return correct IL bit in merge_syn_data_abort 2020-03-21 12:08:05 -04:00
translate-a64.c target/arm: Use clear_vec_high more effectively 2020-06-14 21:06:40 -04:00
translate-a64.h target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree 2020-05-15 23:26:51 -04:00
translate-neon.inc.c target/arm: Convert NEON VFMA, VFMS 3-reg-same insns to decodetree 2020-05-15 23:49:20 -04:00
translate-sve.c target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree 2020-05-15 23:26:51 -04:00
translate-vfp.inc.c target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree 2020-05-15 23:26:51 -04:00
translate.c target/arm: Convert NEON VFMA, VFMS 3-reg-same insns to decodetree 2020-05-15 23:49:20 -04:00
translate.h target/arm: Vectorize SABA/UABA 2020-05-15 22:15:14 -04:00
unicorn.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
unicorn_aarch64.c unicorn_aarch64: Use aa64_vfp_qreg instead of aa32_vfp_dreg 2018-09-03 07:47:40 +01:00
unicorn_arm.c Add implementation of access to the ARM SPSR register. (#1178) 2020-01-14 09:57:55 -05:00
vec_helper.c target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree 2020-05-15 23:26:51 -04:00
vfp-uncond.decode target/arm: Split VMINMAXNM decode 2020-03-22 00:09:53 -04:00
vfp.decode target/arm: Split VFM decode 2020-03-22 00:07:53 -04:00
vfp_helper.c softfloat: Name compare relation enum 2020-05-21 18:08:52 -04:00