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unicorn/qemu/target/arm
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Peter Maydell 3619f707a6
target/arm: Clear CPSR.IL and CPSR.J on 32-bit exception entry 
On 32-bit exception entry, CPSR.J must always be set to 0
(see v7A Arm ARM DDI0406C.c B1.8.5). CPSR.IL must also
be cleared on 32-bit exception entry (see v8A Arm ARM
DDI0487C.a G1.10).

Clear these bits. (This fixes a bug which will never be noticed
by non-buggy guests.)

Backports commit 829f9fd394ab082753308cbda165c13eaf8fae49 from qemu
2018-08-25 04:28:22 -04:00
..
arm-powerctl.c ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm-powerctl.h ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2018-03-02 00:20:11 -05:00
cpu-qom.h target/arm: Add "-cpu max" support 2018-03-12 10:11:49 -04:00
cpu.c target/arm: add cortex-m0 CPU model 2018-08-17 14:01:00 -04:00
cpu.h target/arm: Adjust FPCR_MASK for FZ16 2018-08-17 14:02:49 -04:00
cpu64.c target/arm: Add sve-max-vq cpu property to -cpu max 2018-08-17 13:57:51 -04:00
crypto_helper.c target/arm/cpu and crypto_helper: Correct bad merge and adjust to qemu code style 2018-03-12 11:57:24 -04:00
helper-a64.c tcg: Fix helper function vs host abi for float16 2018-06-02 10:10:12 -04:00
helper-a64.h target/arm: Implement FCMP for fp16 2018-05-15 22:24:39 -04:00
helper-sve.h target/arm: Implement SVE fp complex multiply add 2018-07-03 04:21:41 -04:00
helper.c target/arm: Clear CPSR.IL and CPSR.J on 32-bit exception entry 2018-08-25 04:28:22 -04:00
helper.h target/arm: Implement SVE dot product (indexed) 2018-07-03 04:42:41 -04:00
internals.h target/arm: Add pre-EL change hooks 2018-04-26 09:21:54 -04:00
iwmmxt_helper.c Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
kvm-consts.h arm: better stub version for MISMATCH_CHECK 2018-03-02 00:13:45 -05:00
Makefile.objs target/arm: Implement SVE predicate test 2018-05-20 01:16:16 -04:00
neon_helper.c target/*/cpu.h: remove softfloat.h 2018-03-08 09:58:47 -05:00
op_addsub.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
op_helper.c target/arm: Permit accesses to ELR_Hyp from Hyp mode via MSR/MRS (banked) 2018-08-22 12:51:42 -04:00
psci.c fix WFI/WFE length in syndrome register 2018-03-05 11:21:51 -05:00
sve.decode target/arm: Implement SVE dot product (indexed) 2018-07-03 04:42:41 -04:00
sve_helper.c target/arm: Use fp_status_fp16 for do_fmpa_zpzzz_h 2018-08-17 14:04:20 -04:00
translate-a64.c target/arm: Fix aa64 FCADD and FCMLA decode 2018-08-17 14:06:01 -04:00
translate-a64.h target/arm: Extend vec_reg_offset to larger sizes 2018-06-15 12:23:35 -04:00
translate-sve.c target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-half 2018-08-17 14:05:10 -04:00
translate.c target/arm: Implement AArch32 ERET instruction 2018-08-22 12:56:14 -04:00
translate.h target/arm: convert conversion helpers to fpst/ahp_flag 2018-05-19 22:58:25 -04:00
unicorn.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
unicorn_aarch64.c unicorn/aarch64: Use qemu-provided helpers for accessing VFP/NEON/SIMD registers 2018-03-07 11:25:41 -05:00
unicorn_arm.c Use DEFINE_MACHINE() to register all machines 2018-03-11 15:12:46 -04:00
vec_helper.c target/arm: Implement SVE dot product (indexed) 2018-07-03 04:42:41 -04:00