Alistair Francis ab7c1570d8 target/riscv: Add the force HS exception mode ... Add a FORCE_HS_EXCEP mode to the RISC-V virtulisation status. This bit specifies if an exeption should be taken to HS mode no matter the current delegation status. This is used when an exeption must be taken to HS mode, such as when handling interrupts. Backports commit c7b1bbc80fc2af17395d3986c346fd2307e57829 from qemu		2020-03-22 01:16:55 -04:00
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insn_trans	target/riscv: fsd/fsw doesn't dirty FP state	2020-03-21 12:20:52 -04:00
cpu-param.h	tcg: Split out target/arch/cpu-param.h	2019-06-10 19:35:46 -04:00
cpu.c	target/riscv: Rename the H irqs to VS irqs	2020-03-22 01:09:04 -04:00
cpu.h	target/riscv: Add the force HS exception mode	2020-03-22 01:16:55 -04:00
cpu_bits.h	target/riscv: Add the force HS exception mode	2020-03-22 01:16:55 -04:00
cpu_helper.c	target/riscv: Add the force HS exception mode	2020-03-22 01:16:55 -04:00
cpu_user.h	Supply missing header guards	2019-06-12 10:59:10 -04:00
csr.c	target/riscv: Add support for the new execption numbers	2020-03-22 01:07:23 -04:00
fpu_helper.c	target/riscv: rationalise softfloat includes	2019-11-18 21:17:03 -05:00
helper.h	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
insn16-32.decode	target/riscv: Split RVC32 and RVC64 insns into separate files	2019-05-28 19:00:23 -04:00
insn16-64.decode	target/riscv: Add checks for several RVC reserved operands	2019-05-28 19:20:36 -04:00
insn16.decode	target/riscv: Add checks for several RVC reserved operands	2019-05-28 19:20:36 -04:00
insn32-64.decode	target/riscv: Convert RV64D insns to decodetree	2019-03-18 16:57:16 -04:00
insn32.decode	target/riscv: Name the argument sets for all of insn32 formats	2019-05-28 18:36:53 -04:00
instmap.h	Supply missing header guards	2019-06-12 10:59:10 -04:00
Makefile.objs	target/riscv: Split RVC32 and RVC64 insns into separate files	2019-05-28 19:00:23 -04:00
op_helper.c	riscv: Set xPIE to 1 after xRET	2020-03-21 12:18:59 -04:00
pmp.c	RISC-V: Fix a PMP bug where it succeeds even if PMP entry is off	2019-08-08 16:55:52 -04:00
pmp.h	RISC-V: Check for the effective memory privilege mode during PMP checks	2019-08-08 16:52:57 -04:00
translate.c	target/riscv: update mstatus.SD when FS is set dirty	2020-03-21 12:22:56 -04:00
unicorn.c	target/riscv: Add the virtulisation mode	2020-03-22 01:15:06 -04:00
unicorn.h	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00